Help shape the future of secure RF communications by designing FPGA architectures for next-generation mission-critical communication systems. The role owns work from concept through deployment, including defining architectures, developing high-performance VHDL/Verilog, optimizing for speed and resource efficiency, and validating designs through simulation and bench testing. The engineer partners with hardware, software, and systems engineers to develop mixed-signal and RF processing solutions. The position is based in San Diego, California, follows a 9/80 schedule (nine workdays in each 14-day period, totaling 80 hours, with every other Friday off), and may require travel up to 10% to engage with stakeholders and support on-site integration. The successful candidate must be able to obtain and maintain at least a Secret clearance.
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Job Type
Full-time
Career Level
Mid Level