SoC Design Engineer

OMNIVISION•Santa Clara, CA

1d•$156,853 - $160,000•Onsite

About The Position

This role is responsible for the digital design and verification of image sensor and SoC systems. The engineer will be involved in IP design, integration, analysis, and validation, with a focus on image sensor control and processing functions, as well as high-speed interfaces like USB and MIPI. The position requires performing full-chip integration, verification, and system-level validation within standard ASIC design flows. Collaboration with back-end teams on floorplanning, timing closure, STA, and DFT is expected. The engineer will also design and integrate ISP data paths, execute ASIC implementation tasks (RTL coding, simulation, synthesis, formal verification, DFT), and conduct chip bring-up, silicon validation, debugging, and performance tuning. FPGA prototyping and validation are also part of the responsibilities. The role involves developing verification environments and models, supporting hardware/software co-simulation, and collaborating with various engineering teams on system design, architecture, implementation, and product qualification. Documentation of architecture, registers, interfaces, and design is also required.

Requirements

Master’s degree or foreign equivalent degree in Electrical Engineering, Computer Engineering, or related fields.
One year experience in Digital Design.
Experience with Wi-Fi PHY baseband RTL design and verification.
Experience with digital signal processing module implementation using Verilog.
Experience with module-level verification and full-chip integration support.
Experience with design optimization techniques for area, power, and timing.
Experience using industry-standard digital design and verification tools.
Experience reading schematics and data sheets for software driver development on the SoC.

Responsibilities

Digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation.
Design and verify image sensor control and processing functions, as well as high-speed interfaces such as USB and MIPI.
Perform full-chip integration, verification, and system-level validation following standard ASIC design flows.
Work closely with back-end teams on floorplanning, timing closure, static timing analysis (STA), and design-for-test (DFT).
Design and integrate ISP data paths according to PRD/design specifications and overall SoC architecture.
Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification, and DFT using industry-standard EDA tools.
Conduct chip bring-up, silicon validation, debugging, and performance tuning.
Participate in FPGA prototyping and validation activities.
Develop verification environments and models using SystemVerilog, SVA, Python, and Perl, and support hardware/software co-simulation.
Collaborate with sensor, analog, algorithm, and application engineers on system design, module-level architecture, RTL implementation, micro-architecture design, image tuning, and product qualification.
Prepare and maintain architecture, register, interface, and design documentation throughout the development lifecycle.