Apple Inc. is hiring a Silicon Prototype Engineer in Cupertino, California, and various unanticipated locations throughout the USA. The role builds and sets up emulation models for SoC designs at full-chip and block level using Verilog RTL. It writes and modifies Verilog RTL, C/C++ DPI transactors, SystemVerilog assertions, and coverage, and uses scripting languages to maintain and create emulation model build and runtime flows. The engineer collaborates with CAD, design verification, silicon validation, DFT, and software teams to develop emulation capabilities, debug and root-cause issues, and develop enhancements and performance optimizations with EDA vendors. The role also works with CAD, DFT, and infrastructure teams to optimize emulator hardware resources and reservations. The position is 40 hours per week.
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Job Type
Full-time