Signal Integrity Intern

Meta • Menlo Park, CA

7d • $6,688 - $11,880 • Onsite

About The Position

Meta is seeking a platform Signal Integrity (SI) intern to join its Infra HDRTP team, which designs, optimizes, and validates hardware platforms for AI, compute, storage, and network infrastructure. The intern will contribute to the design phase of new product introduction (NPI) projects, collaborating with cross-functional team members and ODM partners. The role provides hands-on experience with advanced hardware technologies and mentorship from experienced professionals. This is a 12-week internship in Menlo Park, California.

Requirements

• Currently pursuing or holding a Master's degree in Electrical Engineering, Computer Science and Engineering, or a related field.
• Demonstrated theoretical foundation and practical experience in electrical design and validation.
• Experience with computer and server system architecture.
• Proficiency in CAD software for schematic capture, PCB layout, and ADS simulation.
• Must obtain work authorization in the country of employment by the time of hire and maintain work authorization during employment.
• Intent to return to a full-time degree program after completing the internship.

Nice To Haves

• Theoretical and practical knowledge of high-speed signal integrity design and validation, as well as electromagnetics, antennas, and microwave engineering.
• Experience with board design from schematic entry through board layout and fabrication.
• Knowledge or experience in semiconductor devices, VLSI design, or microelectronic devices.
• Experience with standard signal integrity and power integrity tools, such as HFSS, CST, HyperLynx, ADS, and Spice.
• Familiarity with IEEE 802.3.dj specifications and the COM tool.
• Practical experience with lab tools such as a spectrum analyzer, VNA, TDR, and real-time or sampling oscilloscope.
• Demonstrated analytical and problem-solving skills and ability to work independently.

Responsibilities

• Collaborate on developing AI and network hardware designs and system solutions, from conceptualization through deployment.
• Contribute to requirements for novel solutions and lead the design, development, and testing of passive and active electrical interfaces for high-speed links, including 224 Gbps+, PCIe Gen6+, and other interfaces.
• Perform high-speed modeling and simulation, including pre-layout and post-layout signal integrity analysis.
• Analyze PCB stackups and validate AC/DC power integrity.
• Simulate COM and IBIS-AMI models.
• Design, develop, and test components, and create software automation for systems and products using diverse technologies.
• Collaborate across Meta and with system and ASIC suppliers to drive Meta requirements for development, planning, operation, and fleet deployment.

What This Job Offers

• Job Type: Full-time
• Career Level: Intern