Signal Integrity Engineer

Everpure•Santa Clara, CA
•$149,999 - $224,000•Onsite

About The Position

As a Signal Integrity (SI) Engineer, you will support the development and validation of high-performance storage platforms, helping ensure robust electrical performance. You will work with experienced design engineers on electrical modeling, design reviews, lab testing, and issue resolution across the product lifecycle. The role provides hands-on SI experience and collaboration with Hardware Design, PCB Layout, firmware, and manufacturing teams. The position supports high-speed interfaces across hardware products, including PCIe Gen5+, 800G Ethernet, and DDR5, with a focus on product reliability and performance margins from initial link budgets through production release. It also contributes to organization-wide design standards and automated simulation, reporting, and model/layout quality checks. The role is based primarily in the office in Santa Clara, California, in compliance with company policies, subject to PTO, work travel, or other approved leave. The annual base salary range is $149,999–$224,000 USD. The role may be eligible for incentive pay and/or equity.

Requirements

  • Foundational knowledge of high-speed channel design and validation for modern interfaces such as PCIe Gen4+, 25G+ SerDes Ethernet, and DDR4/DDR5.
  • Understanding of electromagnetic concepts, crosstalk mitigation, and jitter analysis.
  • Exposure to industry-standard EDA tools such as HyperLynx, Sigrity, Simbeor, or HFSS for pre- and post-layout SI analysis, including IBIS-AMI, COM, and channel modeling.
  • Hands-on laboratory experience using high-speed instruments such as VNA, TDR, BERT, and oscilloscopes.
  • Ability to work effectively on a cross-functional team, communicate clearly, ask questions, document results, learn from senior engineers, and contribute to technical decisions.
  • Experience with scripting or data analysis, preferably using Python, MATLAB, or similar tools, to automate analysis, process results, or generate reports.

Responsibilities

  • Support signal integrity across hardware products and high-speed interfaces, ensuring product reliability and maximizing performance margins from initial link budgets through production release.
  • Collaborate with PCB layout, hardware, and mechanical teams to define design standards for stackups, materials, routing rules, and constraints, supporting first-pass success and manufacturing quality across product lines.
  • Serve as the SI technical anchor for complex system-level debugging, root-cause analysis, and corrective-action implementation across prototypes, validation, and field escalations.
  • Develop and standardize automated simulation flows, reporting pipelines, and Continuous Integration-style checks for model and layout quality across the hardware organization.
  • Contribute to electrical modeling, design reviews, lab testing, and issue resolution throughout the product lifecycle.
  • Collaborate with Hardware Design, PCB Layout, firmware, and manufacturing teams.

Benefits

  • Flexible time off
  • Wellness resources
  • Company-sponsored team events
  • The role may be eligible for incentive pay and/or equity
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