Principal Signal Integrity Engineer
About The Position
Hewlett Packard Enterprise is seeking a Principal Signal Integrity Engineer to provide technical leadership for signal and power integrity across multiple storage platforms and future technology generations. The role serves as a recognized subject matter expert, influencing architecture, design methodologies, engineering standards, and technology roadmaps. The engineer will help shape enterprise and AI storage infrastructure and lead SI/PI architecture from concept through production, including work with next-generation high-speed SerDes technologies. This position is hybrid and requires working an average of two days per week from an HPE office. The role involves setting SI/PI strategy and standards, resolving complex technical challenges, improving simulation and validation methods, evaluating emerging technologies, and partnering across engineering disciplines. It also includes mentoring engineers, contributing to technical innovation, and serving as the final escalation point for critical SI/PI decisions. HPE describes its culture as valuing innovation, collaboration, technical excellence, continuous learning, inclusion, and employee growth. The company offers benefits intended to support physical, financial, and emotional wellbeing, as well as personal and professional development programs. The stated annual base salary range is USD 147,000–279,000 in Colorado and USD 140,000–321,000 in North Carolina and Texas; variable incentives may also be offered. The estimated application-period closure is November 30, 2026.
Requirements
- Bachelor's, master's, or PhD degree in Electrical Engineering, Computer Engineering, or a related field.
- 15 or more years of experience in signal integrity, power integrity, package design, PCB design, and high-speed system architecture.
- Recognized expertise in high-speed digital system design, including electromagnetic theory, transmission-line behavior, crosstalk, loss mechanisms, jitter, equalization, and channel optimization.
- Extensive experience architecting and validating high-speed systems using advanced SerDes technologies and complex storage platforms.
- Demonstrated success leading SI/PI strategies across multiple large-scale product developments from concept through production.
- Expert knowledge of SI/PI simulation methodologies, including time-domain, frequency-domain, statistical, BER, and electromagnetic analysis.
- Deep expertise with industry-standard tools such as Synopsys HSPICE, Keysight ADS, Ansys HFSS, SIwave, PowerSI, and Cadence design environments.
- Extensive experience defining PCB stack-ups, design constraints, routing architectures, power distribution networks, and signal integrity requirements for high-volume products.
- Hands-on expertise with advanced laboratory instrumentation, including VNAs, TDRs, high-bandwidth oscilloscopes, spectrum analyzers, and compliance test equipment.
- Proven ability to correlate simulation results with laboratory measurements and improve modeling accuracy and design predictability.
- Strong understanding of system-level interactions among signal integrity, power integrity, thermal performance, electromagnetic compatibility, and manufacturability.
Nice To Haves
- Demonstrated technical leadership across geographically distributed engineering teams.
- Ability to influence architecture and engineering decisions across organizations without direct authority.
- Proven track record of mentoring engineers and developing technical capabilities within an organization.
- History of innovation through patents, publications, industry collaboration, or significant technical contributions.
- Excellent communication and presentation skills, including explaining complex technical concepts to engineers, architects, executives, and customers.
- Strong business and engineering judgment, balancing technical excellence with schedule, product cost, risk, and scalability.
- Self-directed leadership and ability to define technical direction in highly ambiguous environments.
Responsibilities
- Define and drive SI/PI technical strategy, methodologies, design standards, and engineering best practices across storage hardware platforms.
- Lead signal and power integrity architecture for next-generation storage systems, influencing platform design from concept through production.
- Provide technical leadership for high-speed interfaces, including next-generation SerDes technologies.
- Establish SI/PI design guidelines, PCB stackup strategies, routing methodologies, and validation approaches.
- Lead cross-functional technical reviews and resolve complex SI/PI challenges across products and engineering disciplines.
- Develop simulation methodologies, modeling approaches, and automation techniques to improve productivity and design quality.
- Drive SI technology readiness for future storage products by evaluating emerging technologies and enabling new architectures and materials.
- Lead root-cause investigations of field, validation, and manufacturing issues involving signal integrity, power integrity, timing, and electromagnetic interactions.
- Partner with PCB, mechanical, thermal, and system architects to optimize end-to-end electrical performance.
- Champion technical innovation through patents, industry engagement, publications, and contributions to next-generation technology development.
- Mentor and develop engineers across multiple sites and build organizational SI expertise.
- Serve as the final escalation point for critical SI/PI technical decisions, balancing performance, risk, schedule, and product cost.
Benefits
- Benefits intended to support physical, financial, and emotional wellbeing.
- Programs supporting personal and professional development and career goals.
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What This Job Offers
Job Type
Full-time
Career Level
Principal
