Signal and Power Integrity Intern, MS - Summer 2027
Marvell Technology•Santa Clara, CA
•$37 - $73•Onsite
About The Position
Marvell’s team designs advanced packaging for photonic fabric products, including CPO and NPO platforms. The team provides advanced package design covering signal integrity, power integrity, and physical design for optical links used in data center interconnects. In this on-site internship in Santa Clara, you will implement a portion of a design and develop automation for channel and packaging analysis, field-solver modeling, and simulation-deck integration.
Requirements
- Currently enrolled in a bachelor’s or master’s degree program in Electrical Engineering or a related field, with an expected graduation date between Fall 2027 and Summer 2028.
- Prior coursework in electronics, circuit design, and programming.
- Knowledge of circuit design and analysis.
- Understanding of chip physical integration and layout concepts.
- Skills with circuit simulation tools such as SPICE and Matlab.
- Familiarity with Cadence Allegro, Ansys HFSS, Siwave, and Sigrity.
- Understanding of IBIS and S-parameter models.
- Strong analytical skills.
- Familiarity with Python for automation or scripting.
Responsibilities
- Define a template modeling and simulation flow to automate channel and packaging analysis.
- Apply the template to automate modeling for various field solvers.
- Build an automation flow that links package models to simulation decks.
Benefits
- Medical, dental, and vision coverage.
- Perks and discounts.
- Mental health resources.
- Paid holidays.
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What This Job Offers
Job Type
Full-time
Career Level
Intern
