About The Position

Join Apple’s high-speed SerDes team to develop next-generation, high-performance wireline transceivers and intellectual property for Apple system-on-chips. The role involves working with cross-functional Analog Mixed-Signal design teams to deliver state-of-the-art IP that meets high standards for quality, innovation, efficiency, and customer experience. Develop high-performance, high-speed Analog Mixed-Signal circuits for SerDes PHYs. Evaluate circuit topologies against product requirements and power, performance, and area goals. Work with architecture, SIPI, packaging, board design, DFT, ESD, and SoC teams on block specifications, transistor-level implementation, behavioral modeling, mask design, and delivery of IP views. Communicate progress and discuss ideas with peers and management.

Requirements

  • Bachelor’s degree.
  • Deep understanding of Analog Mixed-Signal design and experience with high-speed serial links.
  • Understanding and experience designing Analog Mixed-Signal circuit blocks, including bandgaps, biasing circuits, LDO regulators, amplifiers, comparators, switched-capacitor circuits, ADCs, DACs, oscillators, and filters.
  • Understanding of mismatch mitigation, linearity, stability, low-power, and low-noise techniques.
  • Knowledge of high-speed digital circuits such as serializers, deserializers, counters, and dividers, and solid understanding of digital design concepts.
  • Knowledge of transmitter and receiver equalization techniques and circuits, such as CTLE, DFE, and de-emphasis, for 64+ Gbps NRZ and PAM applications.
  • Knowledge of CDR architectures and implementations.
  • Experience with Analog Mixed-Signal circuit modeling and performance evaluation using tools or languages such as SystemVerilog, Matlab, Python, or VerilogAMS.
  • Hands-on experience with advanced CMOS technologies and FinFET design.
  • Hands-on experience with AMS IC development from definition through high-volume production, including layout supervision, bench evaluation, correlation, and characterization.
  • Understanding of timing closure and related industry tools, such as Nanotime and Primetime.
  • Experience testing high-speed serial I/O in the lab, including debugging and data analysis.
  • Knowledge of common high-speed SerDes protocols such as PCIe, USB, DP, and MPHY.

Nice To Haves

  • Understanding of digitally assisted analog design concepts, such as background calibrations and LMS-based adaptive loops.
  • Knowledge of lab equipment and testing.
  • Scripting and automation skills to enhance efficiency are highly desirable.

Responsibilities

  • Develop high-performance, high-speed Analog Mixed-Signal circuits for SerDes PHYs.
  • Evaluate circuit topologies for product requirements and power, performance, and area (PPA), including receiver, clock and data recovery (CDR), transmitter, bias generator, clock generation and distribution, analog signal chain, and mixed-signal calibration and algorithms.
  • Work with cross-functional teams to create block-level specifications.
  • Execute transistor-level circuit implementation and behavioral modeling.
  • Drive mask design to implement the layout view of designs.
  • Work with SoC teams to deliver IP views and ensure they meet quality standards.
  • Communicate progress and discuss ideas with peers and management.
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