SerDes Circuit Design Engineer

Apple • San Diego, CA

18h

About The Position

Join Apple’s high-speed SerDes team developing next-generation, high-performance wireline transceivers and intellectual property for Apple systems-on-chip. The role focuses on developing high-performance, high-speed analog and mixed-signal circuits for SerDes PHYs, evaluating circuit topologies against product requirements, and achieving best-in-class power, performance, and area.

You will collaborate with cross-functional analog and mixed-signal teams and partners in architecture, signal integrity and power integrity, packaging, board design, DFT, and ESD. The work spans block-level specification, transistor-level implementation, behavioral modeling, mask-design and layout coordination, and delivery of IP views to SoC teams against quality standards. You will also communicate progress and discuss ideas with peers and management while contributing to complex IP development.

Requirements

• Bachelor’s degree or higher; a bachelor’s degree is the minimum requirement.
• Deep understanding of analog mixed-signal design and experience with high-speed serial links.
• Understanding and experience designing analog mixed-signal circuit blocks, including bandgaps, biasing circuits, LDO regulators, amplifiers, comparators, switched-capacitor circuits, ADCs, DACs, oscillators, and filters.
• Understanding of analog mixed-signal concepts such as mismatch mitigation, linearity, stability, and low-power and low-noise techniques.
• Understanding of digitally assisted analog design concepts, such as background calibration and LMS-based adaptive loops.
• Experience with high-speed digital circuits, such as serializers, deserializers, counters, and dividers, and solid understanding of digital design concepts.
• Knowledge of transmitter and receiver equalization techniques and circuits, such as CTLE, DFE, and de-emphasis, for 64+ Gbps NRZ and PAM applications.
• Knowledge of CDR architectures and implementations.
• Knowledge of laboratory equipment and testing.
• Experience in analog mixed-signal circuit modeling and performance evaluation using tools or languages such as SystemVerilog, MATLAB, Python, or Verilog-AMS.
• Hands-on experience with advanced CMOS technologies and FinFET design.
• Hands-on experience with AMS IC development from definition through high-volume production, including layout supervision, bench evaluation, correlation, and characterization.
• Knowledge of timing closure concepts and related industry tools, such as Nanotime and Primetime.
• Experience with lab testing of high-speed serial I/O, debugging, and data analysis techniques.
• Knowledge of common high-speed SerDes protocols, such as PCIe, USB, DP, and M-PHY.

Nice To Haves

• Skills in scripting and automation to enhance efficiency.

Responsibilities

• Develop high-performance, high-speed analog and mixed-signal circuits for SerDes PHYs.
• Evaluate circuit topologies for product requirements, including receiver, CDR, transmitter, bias generator, high-speed clock generation and distribution, analog signal-chain, and mixed-signal calibration and algorithm blocks.
• Optimize designs for power, performance, and area.
• Collaborate with cross-functional teams to create block-level specifications and execute transistor-level implementation and behavioral modeling.
• Drive mask design to implement the layout view of designs.
• Work with SoC teams to deliver IP views and ensure they meet quality standards.
• Communicate project progress and discuss ideas with peers and management.
• Perform lab testing of high-speed serial I/O, debugging, and data analysis.

What This Job Offers

• Job Type: Full-time