SerDes Circuit Design Engineer

Apple•San Diego, CA

About The Position

Join Apple’s high-speed SerDes team to design next-generation, high-performance wireline transceiver IP for system-on-chip products. The role involves developing high-speed analog and mixed-signal circuits for SerDes PHYs and evaluating circuit topologies against product requirements, with a focus on power, performance, and area. Circuit areas may include receivers, clock and data recovery, transmitters, bias generators, high-speed clock generation and low-jitter distribution, analog signal chains, and mixed-signal calibration and algorithms. You will collaborate with cross-functional teams to define block-level specifications, implement transistor-level designs, and develop behavioral models. You will also drive mask design for circuit layouts and work with system-on-chip teams to deliver IP views that meet quality standards. Regular interaction with peers and management will support progress updates and discussion of ideas.

Requirements

  • Bachelor’s degree.
  • Deep understanding of analog mixed-signal design and experience with high-speed serial links.
  • Understanding of analog mixed-signal circuit blocks, including bandgaps, biasing circuits, LDO regulators, amplifiers, comparators, switched-capacitor circuits, ADCs, DACs, oscillators, and filters.
  • Understanding of analog mixed-signal concepts including mismatch mitigation, linearity, stability, and low-power and low-noise techniques.
  • Understanding of digitally assisted analog design concepts, such as background calibration and LMS-based adaptive loops.
  • Experience with high-speed digital circuits such as serializers, deserializers, counters, and dividers, and a solid understanding of digital design concepts.
  • Knowledge of Tx/Rx equalization techniques and circuits, such as CTLE, DFE, and de-emphasis, for 64+ Gbps NRZ and PAM applications.
  • Knowledge of CDR architectures and implementations.
  • Knowledge of laboratory equipment and testing.
  • Experience in analog mixed-signal circuit modeling and performance evaluation using tools such as SystemVerilog, Matlab, Python, or VerilogAMS.
  • Hands-on experience with advanced CMOS technologies and FinFET design.
  • Hands-on experience with AMS IC development from definition through high-volume production, including layout supervision, bench evaluation, correlation, and characterization.
  • Understanding of timing closure and related industry tools such as Nanotime and Primetime.
  • Experience testing high-speed serial I/O in a lab, including debug and data analysis.
  • Knowledge of common high-speed SerDes protocols such as PCIe, USB, DP, and MPHY.

Nice To Haves

  • Skills in scripting and automation to enhance efficiency.

Responsibilities

  • Develop high-performance, high-speed analog and mixed-signal circuits for SerDes PHYs.
  • Evaluate circuit topologies for product requirements and optimize power, performance, and area.
  • Collaborate with architecture, SIPI, packaging, board design, DFT, and ESD teams to create block-level specifications.
  • Execute transistor-level circuit implementation and behavioral modeling.
  • Drive mask design to implement layout views of designs.
  • Work with system-on-chip teams to deliver IP views that meet quality standards.
  • Communicate progress and discuss ideas with peers and management.
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