Join Apple’s high-speed SerDes team to design next-generation, high-performance wireline transceiver IP for system-on-chip products. The role involves developing high-speed analog and mixed-signal circuits for SerDes PHYs and evaluating circuit topologies against product requirements, with a focus on power, performance, and area. Circuit areas may include receivers, clock and data recovery, transmitters, bias generators, high-speed clock generation and low-jitter distribution, analog signal chains, and mixed-signal calibration and algorithms. You will collaborate with cross-functional teams to define block-level specifications, implement transistor-level designs, and develop behavioral models. You will also drive mask design for circuit layouts and work with system-on-chip teams to deliver IP views that meet quality standards. Regular interaction with peers and management will support progress updates and discussion of ideas.
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Job Type
Full-time