Senior Silicon Product Engineer – Manufacturing

NVIDIA•Us, CA

9d•Hybrid

About The Position

NVIDIA is hiring a Senior Silicon Product Engineer – Manufacturing for its Testability, Manufacturability, Reliability & Quality (TMRQ) team within the Silicon Co-Design Group. The group supports GPU, SoC, and CPU silicon programs from first power-on through high-volume production. This role co-designs and implements system-level test (SLT) production diagnostics for silicon features, verifies production specifications, and supports post-silicon validation. It translates product requirements into effective test coverage that supports quality, yield, and manufacturing efficiency at scale. The position works across hardware and software teams and Production Operations, contributing to the silicon co-design cycle, production release, and high-volume manufacturing testing. The successful candidate is expected to improve manufacturing workflows and products across functions and use AI deliberately while managing risk.

Requirements

Bachelor’s or Master’s degree, or equivalent experience, in Microelectronics, Electrical, Electronic, or Computer Engineering, or an equivalent field or background.
At least 8 years of relevant experience in silicon post-silicon PVT validation and/or high-volume manufacturing testing for sophisticated SoCs, GPUs, CPUs, or similar products.
Hands-on lab experience with silicon bring-up, lab debug, test-content bring-up, and correlation to silicon characterization, yield, and coverage optimization.
Strong electrical engineering fundamentals and device physics knowledge, along with knowledge of silicon design, statistics, STA concepts, signal integrity, fault analysis, sampling, and computer architecture.
Excellent interpersonal skills and demonstrated ability to drive cross-functional alignment on plans, dependencies, and sign-off criteria.
Prior ownership of manufacturing test strategy for a major silicon product such as a GPU, SoC, or CPU, from early planning through ramp to QS/production.
Strong data analysis skills.
Understanding of firmware and driver structures and their interaction with hardware.
Problem-solving, debugging, analysis, and logical-reasoning skills demonstrated with examples.
Experience with Python, BASH, Linux, and scripting.

Nice To Haves

Prior experience working with volume data.
Outstanding work ethic and ability to elevate discussions to solve the real problems.
Native use of AI tools to accelerate production testing and debug workflows.
Experience with GPUs, CPUs, AI accelerators, or other large-scale SoCs, including firsthand understanding of how complexity at scale affects failures and engineering decisions.
Experience co-designing or leading cross-functional alignment on production methodologies adopted by other teams in a high-volume manufacturing environment.

Responsibilities

Partner with hardware engineering teams, including silicon PVT design and characterization, IO design and validation, system feature owners, and SLT and BLT Production Operations, to determine test coverage and constraints and establish SLT test conditions, content, and flows for high-volume manufacturing screens.
Partner with software and platform teams to support and improve SLT testing infrastructure, debug controls, and data collection features for manufacturing screens.
Co-design SLT testability scope and coverage enhancements for NVIDIA manufacturing testing, focusing on high-volume system-level manufacturing screens.
Prototype and fine-tune speed, power, circuits, yield, and quality to achieve effective silicon coverage in the SLT socketed environment.
Co-design, develop, and maintain SLT testing flows, incorporating silicon learnings and correlating them to design.
Define procedures for silicon correlation between production testing infrastructure and internal silicon characterization and diagnostics programs.
Support customer-facing and quality teams during customer escalations by investigating issues and addressing gaps in SLT production coverage.
Drive alignment on manufacturability, test-time optimization and reduction, and cost-versus-coverage tradeoffs to evaluate the effectiveness of new tests.
Initiate and drive process improvements and preventative actions through root-cause analysis and data analytics.