Senior RF / Electromagnetic (EM) Modeling Engineer

The AES Group • Sunnyvale, CA

5d

About The Position

The Senior RF / Electromagnetic (EM) Modeling Engineer will work on an advanced semiconductor and chip design program with a technology company in the Bay Area. The role focuses on electromagnetic modeling and characterization of on-chip passive components—including inductors, capacitors, transformers, and LC tanks—for RF circuits, oscillators, PLLs, and other high-performance analog/RF applications. The engineer will use Ansys HFSS and IC-focused electromagnetic simulation tools, develop circuit-level models, and correlate simulation results with silicon measurements.

The position works closely with RF and analog circuit designers to assess how passive-component characteristics and parasitics affect circuit performance. It also involves configuring technology and PDK simulation environments and automating simulation, parameter-sweep, and model-extraction workflows. The role is listed in Mountain View, California, as onsite / hybrid.

Requirements

• Master's or PhD degree in Electrical Engineering specializing in RF, microwave engineering, or electromagnetics; bachelor's degree candidates with equivalent relevant industry experience will also be considered.
• At least 5 years of relevant industry experience in RF electromagnetic modeling, simulation, or on-chip passive-component characterization.
• Strong hands-on experience with Ansys HFSS, specifically for on-chip integrated-circuit structures and passive components.
• Practical experience with at least one IC-focused EM simulation tool: Cadence EMX, Ansys RaptorX, Keysight Momentum, Sonnet, or Cadence Clarity 3D.
• Strong understanding of RF passive components, LC tanks, and their applications in oscillators, PLLs, matching networks, and LNAs.
• Experience integrating EM-extracted models into circuit-simulation environments such as Cadence Virtuoso with Spectre/SpectreRF or Keysight ADS.
• Strong understanding of S-parameters, Smith charts, impedance matching, and RF de-embedding techniques.
• Ability to interpret simulation results, troubleshoot model discrepancies, and collaborate effectively with circuit-design teams.

Nice To Haves

• Experience with advanced semiconductor technologies, including CMOS, FinFET, or SiGe processes.
• Exposure to millimeter-wave (mmWave) design and modeling, particularly at frequencies of 28 GHz and above.
• Foundry, PDK, or process-technology experience involving development and characterization of on-chip inductor and capacitor models.
• Hands-on laboratory experience with VNAs, RF probe stations, and on-wafer measurements.
• Experience with silicon-measurement correlation and de-embedding methodologies.
• Exposure to cryogenic RF electronics, superconducting resonators, or low-temperature electromagnetic modeling.

Responsibilities

• Develop and simulate electromagnetic models of on-chip passive components, including spiral inductors, transformers, baluns, T-coils, varactors, and MOM/MIM capacitors.
• Perform full-wave EM simulations using Ansys HFSS and IC-focused EM tools such as Cadence EMX, Ansys RaptorX, Keysight Momentum, Sonnet, or Clarity 3D.
• Extract and characterize RF parameters including inductance, quality factor (Q), self-resonant frequency (SRF), coupling coefficients, and S-parameters across relevant frequency ranges.
• Develop lumped-element equivalent circuit models, including pi-models, and broadband models suitable for circuit-level simulations.
• Collaborate with RF and analog circuit designers working on LC-VCOs, PLLs, LNAs, matching networks, and resonator-based circuits.
• Evaluate the effects of passive-component quality factor, parasitics, and capacitor-bank configurations on phase noise, frequency tuning range, and overall circuit performance.
• Analyze electromagnetic coupling and parasitic effects from surrounding layout structures, including routing, metal fill, seal rings, substrate, package interconnects, and bumps.
• Correlate EM simulation results with silicon measurements using VNAs, RF probe stations, and appropriate de-embedding techniques.
• Configure metal-stack technology files and PDK-related simulation environments for accurate passive-component modeling.
• Automate simulation workflows, parameter sweeps, and model-extraction processes using Python or similar scripting languages.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior