Sr RF Electromagnetic (EM) Engineer

Qualcomm • San Diego, CA

2d • $133,900 - $200,900

About The Position

The role focuses on package system design and technology engineering, including advanced package technology development, concept and architecture analysis from package to system, product package structure selection, and multi-physics simulation and laboratory validation. The engineer collaborates with multidisciplinary teams to optimize the mechanical, electrical, and thermal performance of package systems for different end-market applications and supports manufacturing qualification for new product introduction.

The position interfaces with internal and external IP teams, industry standards organizations, and vendors to establish package-to-system design and technology specifications. Its work enables high-performance, reliable, cost-effective package systems that are practical to implement and support integrated component attachments for customers.

The role works under supervision, while decisions may affect work beyond the immediate group. It requires verbal and written communication and may involve basic negotiation, influence, and tact; the position has a moderate amount of influence over key organizational decisions.

Requirements

• Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or a related field and 2+ years of System/Package Design/Technology Engineering or related work experience; or a master's degree in one of these fields and 1+ year of related experience; or a PhD in one of these fields.

Nice To Haves

• Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or a related field.
• 3+ years of System/Package Design/Technology Engineering or related work experience.

Responsibilities

• Apply package system design and technology knowledge to package product layout, multi-physics optimization, design verification, design-tool-flow development, and tapeout of discrete packages or modules/SiPs for single- or multi-die bare-silicon products.
• Assist with package-to-system cooling architecture simulations and support silicon and package product tapeouts, ensuring thermal performance, quality, reliability, and cost targets are met.
• Perform package-to-system electrical analysis and simulations for digital IP, analog IP, and external components; support SIPI, analog, and PDN solution development across SoCs, substrates, interposers, components, and system platforms.
• Assist with package-to-system tapeout preparation to meet electrical performance, quality, reliability, and cost goals.
• Simulate package mechanical interactions to optimize designs, materials, and reliability and improve product-development efficiency.
• Conduct empirical testing on materials and devices, characterize mechanical and electrical performance, and analyze board- and system-level interactions.
• Develop and implement packaging technology solutions for varied end-market applications to meet performance and cost targets.
• Develop, evaluate, and qualify next-generation semiconductor packaging substrate technologies, including structure, process, materials, and design rules.
• Develop and integrate next-generation heterogeneous integration solutions, including substrate, bridge-die, and interposer-based 2.5D chiplet architectures.
• Develop and optimize 3D integration technologies, including die-to-wafer, die-to-die, and wafer-to-wafer stacking for STCO; enable high-density interconnects and implement design rules for reliable, high-yield die stacking.
• Collaborate with team members to accomplish goals while meeting quality expectations.

Benefits

• Competitive annual discretionary bonus program.
• Opportunity for annual RSU grants, except for employees on sales-incentive plans.
• Competitive benefits package designed to support employees at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior