Senior Mask Layout Design Engineer

NVIDIA•Santa Clara, CA

7d•$132,000 - $207,000•Hybrid

About The Position

NVIDIA is seeking a Senior Mask Layout Design Engineer to join a growing, diverse group responsible for high-speed mixed-signal circuit designs. The role involves collaborating across disciplines with circuit designers and mask designers to create layouts for digital and mixed-signal functions in state-of-the-art sub-micron CMOS technologies using Cadence tools. The engineer will work with ASIC and mixed-signal engineers to customize designs for integration into VLSI products.

Requirements

Bachelor of Science in Electrical Engineering or equivalent experience.
At least 7 years of hands-on layout design experience.
Deep understanding of analog circuit layout concepts in submicron CMOS technologies.
Validated experience with Cadence custom circuit design tools, particularly Virtuoso.
Experience running and debugging DRC and LVS using verification tools such as Dracula, Hercules, or Calibre.
Leadership experience mentoring and assisting junior mask designers, implementing team processes, and maintaining design checklists.
Ability to work effectively in a team, good interpersonal skills, and positive energy.

Nice To Haves

Proficiency in scripting languages such as Perl, Python, or SKILL.
Knowledge of layout automation.

Responsibilities

Collaborate with circuit designers, mask designers, and multidisciplinary teams.
Perform physical layout for digital and mixed-signal functions, including clock generators, op-amps, sensors, security circuits, and power delivery circuits.
Customize designs with ASIC and mixed-signal engineers for integration into VLSI products.
Perform floor planning and custom layout, and verify layouts against design rules and schematics.
Handle fill, post-processing, DRC mitigation, and foundry interactions.
Mentor and assist junior mask designers.
Implement standard team processes and maintain checklists for optimal layout design.
Communicate with mask designers across geographies and time zones.