Senior FPGA Engineer, Verification
About The Position
Radiant is seeking a Senior FPGA Verification Engineer to add to our Embedded Systems team. You will lead verification of FPGAs used in reactor safety, control, and instrumentation systems, covering safety-critical applications, sensor and actuator handling, and communication systems. This role requires close collaboration with RTL design engineers, hardware engineers, embedded software engineers, and test engineers in a cross-functional setting to ensure designs meet the rigorous demands of controlling and monitoring fission reactors. You will be a key contributor in validating the first commercial reactor design in over 50 years.
Requirements
- Bachelor's degree in computer engineering, electrical engineering, or a related field.
- 7+ years of FPGA verification experience with significant depth in functional verification.
- Expert proficiency in SystemVerilog and UVM-based verification methodologies.
- Strong understanding of FPGA verification flows — simulation, coverage analysis, and regression management.
- Experience verifying multi-clock domain designs.
- Familiarity with serial communication protocols such as UART, SPI, and I2C.
- Familiarity with Ethernet as well as AXIS and APB buses.
Nice To Haves
- Experience with the Microchip PolarFire SoC platform.
- Experience with JASPER or similar verification tool.
- Proficiency with Linux and TCL/bash shell scripting.
- Excellent documentation skills and demonstrated ability to work in multidisciplinary engineering environments.
Responsibilities
- Lead verification efforts for FPGA designs using SystemVerilog and UVM/OVM frameworks, from test plan development through coverage closure.
- Develop and maintain automated verification testbenches for functional, regression, constrained-random, and edge-case coverage.
- Define and execute verification strategies for sensor processing, serial communication, and actuator handling logic.
- Collaborate directly with RTL designers and embedded software engineers to identify design intent, resolve bugs, and ensure complete functional coverage.
- Recommend new tools and practices to continuously improve the FPGA verification flow.
- Contribute to RTL design work as needed.
Benefits
- Substantial incentive stock plan for all full-time employees.
- 100% up to base silver level plan for employee + 50% dependents, offers up to Platinum plans for Medical.
- Sponsored memberships for employees and their dependents for One Medical.
- 100% top tier plan coverage + 50% for dependents for Vision.
- 100% top tier plan coverage, orthodontia extra, 50% for dependents for Dental.
- Voluntary life, accident, hospital, critical illness, commuter and FSA/HSA are offered as employee contributed benefits.
- 8-weeks of paid parental leave for all parents.
- Additional paid pregnancy leave for CA employees.
- Daily catered lunch.
- Free snacks and drinks.
- Flexible PTO policy.
- Remote workday allocation.
- Company and team-bonding events, happy hours and in-person camaraderie.
- Beautiful El Segundo headquarters close to the Pacific Ocean.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
