FPGA Verification Engineer (Entry Level)

Sopra Steria•Platteville, WI

2d•Hybrid

About The Position

CS Group USA is seeking an entry-level FPGA Verification Engineer to perform real-time embedded FPGA verification for aerospace and defense systems. The engineer will implement verification strategies as directed and in alignment with verification lifecycles to satisfy DO-254 objectives. The role may be onsite in Connecticut or hybrid, and the company operates primarily remotely with employees across multiple U.S. states. The position involves developing and reviewing verification artifacts, executing verification activities across simulation, integration, target hardware, and Hardware-in-the-Loop environments, and maintaining traceability to device-level requirements. The engineer will collaborate with team members, project leadership, and stakeholders; analyze findings; and communicate technical status while supporting project schedules and quality objectives. U.S. citizenship is required, and travel may be up to two weeks per year.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related engineering, science, or technical discipline.
Strong understanding of engineering principles.
Strong understanding of VHDL, Verilog, SystemVerilog, or similar hardware design languages.
Strong understanding of Python and other equivalent scripting languages.
Strong analytical, troubleshooting, and root-cause investigation skills.
Proficient written and verbal communication skills.
U.S. citizenship is required; dual citizenship should be disclosed.

Responsibilities

Perform directed verification activities for embedded FPGA aerospace and defense systems, including artifact review, test case and test procedure development, analysis, and compilation of results.
Collaborate with team members and project leadership.
Ensure FPGA verification artifacts comply with DO-254 and AC 20-152A objectives.
Work with simulation, integration, target hardware, and Hardware-in-the-Loop (HIL) testing strategies.
Implement hardware design efficiently and accurately in alignment with device-level requirements while maintaining accurate traceability.
Identify, isolate, and analyze verification findings.
Support verification efforts according to developed schedules and quality objectives.
Interface with stakeholders to communicate technical status.
Learn and adapt quickly.