FPGA Verification Engineer (Entry Level)

CS Group•East Hartford, CT
•Hybrid

About The Position

CS Group USA is seeking an entry-level FPGA Verification Engineer to work on real-time embedded FPGA verification for safety-critical aerospace and defense systems. The engineer will implement verification strategies as directed and in alignment with verification lifecycles to satisfy DO-254 objectives. The role may be performed onsite in Connecticut or in a hybrid arrangement. The team operates primarily remotely, with employees across multiple U.S. states. The position involves verification artifact review, test-case and test-procedure development, analysis, and results compilation. The engineer will work with simulation, integration, target hardware, and Hardware-in-the-Loop (HIL) testing strategies; maintain requirements traceability; investigate verification findings; and communicate technical status to stakeholders. Travel may be required for up to two weeks per year. U.S. citizenship is required, and dual citizenship must be disclosed.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related engineering, science, or technical discipline.
  • Strong understanding of engineering principles.
  • Strong understanding of VHDL, Verilog, SystemVerilog, or similar hardware design languages.
  • Strong understanding of Python or equivalent scripting languages.
  • Strong analytical, troubleshooting, and root-cause investigation skills.
  • Proficient written and verbal communication skills.
  • U.S. citizenship is required; dual citizenship must be disclosed.

Responsibilities

  • Perform directed verification activities for embedded FPGA aerospace and defense systems, including artifact review, test-case and test-procedure development, analysis, and results compilation.
  • Collaborate with team members and project leadership.
  • Ensure FPGA verification artifacts comply with DO-254 and AC 20-152A objectives.
  • Work with simulation, integration, target hardware, and Hardware-in-the-Loop (HIL) testing strategies.
  • Implement hardware designs in alignment with device-level requirements while maintaining accurate traceability.
  • Identify, isolate, and analyze verification findings.
  • Support verification efforts in alignment with schedules and quality objectives.
  • Interface with stakeholders to communicate technical status.
  • Learn and adapt quickly.

Benefits

  • Annual cash bonus opportunity for all members.
  • 2% annual retirement benefit opportunity.
  • Training and professional development opportunities for all members.
  • Six paid holidays.
  • Medical, dental, and vision insurance.
  • Vacation, sick time, and bereavement leave.
  • Employee Assistance Program, including mental health benefits.
  • Optional spouse/child life insurance.
  • Whole life insurance, critical illness insurance, legal assistance, and military leave.
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