Senior Emulation Engineer

Microsoft•Mountain View, CA

About The Position

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) develops infrastructure and foundational technologies supporting Microsoft’s online services and Azure. The AI Silicon Engineering (AISiE) SoC Design Verification team verifies Microsoft AI accelerators in collaboration with systems, firmware, architecture, design, validation, and product engineering teams. The Senior Emulation Engineer will develop complex, scalable verification environments optimized for emulation platforms to support functional, performance, and power verification at the SoC level. The role also enables software and firmware teams to use emulation models for shift-left verification and to improve post-silicon readiness. Emulation is an important part of meeting design verification milestones as designs grow and schedules shrink.

Requirements

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and at least 1 year of technical engineering experience; or a master's degree in one of these fields and at least 4 years of technical engineering experience; or a bachelor's degree in one of these fields and at least 5 years of technical engineering experience; or equivalent experience.
  • Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
  • Eligibility to access export-controlled information; the successful candidate must provide proof of citizenship, U.S. permanent residency, or other protected status. Citizenship is verified with a valid passport; lawful permanent residents, refugees, and asylees may use other applicable documents.

Nice To Haves

  • Doctorate in Electrical Engineering, Computer Engineering, Mechanical Engineering, or a related field and at least 3 years of technical engineering experience; or a master's degree in one of these fields and at least 6 years of technical engineering experience; or a bachelor's degree in one of these fields and at least 8 years of technical engineering experience; or equivalent experience.
  • SoC design verification experience with AI accelerators, CPUs, graphics processors, or NPUs.
  • Experience with emulation platforms and associated technologies, including transactors, speed adapters, and virtual solutions.
  • Experience with IO subsystems, including PCIe, Ethernet, and SPI interfaces.
  • Full-stack knowledge across the silicon lifecycle, with collaboration across RTL, firmware, design verification, and platform teams.

Responsibilities

  • Build, validate, and automate emulation models, continually improving runtime efficiency.
  • Collaborate with architects and design engineers to define verification plans, strategies, test environments, and requirements for IP-, subsystem-, and SoC-level verification.
  • Develop reusable verification components, including monitors, trackers, debug flows, assertions, and functional coverage models.
  • Triage and debug failures across testbench, simulation, and emulation environments.
  • Develop Makefiles and automation scripts to support scalable and efficient verification flows.
  • Apply Agile methodologies, including participating in code reviews, sprint planning, and continuous integration practices.
  • Collaborate effectively with cross-functional teams across multiple sites and geographies.

Benefits

  • The role may be eligible for benefits and other compensation.
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