Senior Emulation Engineer

Microsoft•Redmond, WA
•$119,800 - $261,000

About The Position

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) builds and operates core infrastructure and foundational technologies that support Microsoft’s online businesses and Azure platform worldwide. The AI Silicon Engineering (AISiE) SoC Design Verification team verifies Microsoft’s AI accelerators in close partnership with systems, firmware, architecture, design, validation, and product engineering teams. The Senior Emulation Engineer develops complex, scalable verification environments optimized for emulation platforms. The work supports functional, performance, and power verification at the SoC level, and enables software and firmware teams to use emulation models for shift-left verification and improved post-silicon readiness. The role contributes to verification milestones as design complexity grows and schedules become more compressed.

Requirements

  • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or a related field and at least 1 year of technical engineering experience; or a master's degree in one of these fields and at least 4 years of technical engineering experience; or a bachelor's degree in one of these fields and at least 5 years of technical engineering experience; or equivalent experience.
  • Ability to meet Microsoft, customer, and/or government security screening requirements, including passing the Microsoft Cloud Background Check upon hire or transfer and every two years thereafter.
  • As a condition of employment, provide proof of citizenship, U.S. permanent residency, or other protected status to establish eligibility to access export-controlled information; citizenship is verified with a valid passport, with other documentation applicable to lawful permanent residents, refugees, and asylees.

Nice To Haves

  • Doctorate in Electrical Engineering, Computer Engineering, Mechanical Engineering, or a related field and at least 3 years of technical engineering experience; or a master's degree in one of these fields and at least 6 years of technical engineering experience; or a bachelor's degree in one of these fields and at least 8 years of technical engineering experience; or equivalent experience.
  • AI accelerator, CPU, graphics, or NPU design verification at the SoC level.
  • Experience with emulation platforms and associated technologies, including transactors, speed adapters, and virtual solutions.
  • Experience with I/O subsystems, including PCIe, Ethernet, and SPI interfaces.
  • Full-stack knowledge across the silicon lifecycle, with collaboration across RTL, firmware, design verification, and platform teams.
  • Experience with Zebu or Palladium emulation platforms.

Responsibilities

  • Build, validate, and automate emulation models, continually improving runtime efficiency.
  • Collaborate with architects and design engineers to define verification plans, strategies, test environments, and requirements for IP-, subsystem-, and SoC-level verification.
  • Develop reusable verification components, including monitors, trackers, debug flows, assertions, and functional coverage models.
  • Triage and debug failures across testbench, simulation, and emulation environments.
  • Develop Makefiles and automation scripts for scalable, efficient verification flows.
  • Apply Agile methodologies, including participating in code reviews, sprint planning, and continuous integration practices.
  • Collaborate with cross-functional teams across multiple sites and geographies.
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service