RTL Design Engineer

Advanced Micro Devices, IncOttawa, ON
Onsite

About The Position

At AMD, the mission is to build products that accelerate next-generation computing experiences across AI, data centers, PCs, gaming, and embedded systems. The company fosters a culture of innovation, collaboration, and shared passion to create extraordinary technology, emphasizing bold ideas, human ingenuity, and diverse perspectives. This role offers an opportunity to work on cutting-edge next-generation technologies for future AMD Microprocessors, Graphics Cards, and VR sets. The position is within the rapidly growing field of Chiplet Interconnect technology, supporting both AMD proprietary I/O protocols and driving industry standards like Universal Chiplet Interconnect Express (UCIe) and Ultra Accelerator Link (UALink). The IP portfolio focuses on short/ultra-short reach die-2-die interconnects with various bounding box requirements. As a member of this team, the engineer will be involved in IP development, design-specification, digital design, and collaboration across areas including DFT, Firmware, Design verification, and Physical Design.

Requirements

  • Strong analytical thinking and problem-solving skills
  • Excellent attention to detail
  • Eager to learn new designs and implementation techniques
  • Good collaboration and interpersonal skills
  • Excellent communication skills with leadership qualities
  • Experience with I/O protocols like USB, PCIe, CXL
  • Experience in developing micro-architecture for any given module
  • RTL design experience with multi-clock, high frequency designs, low latency, low power & high performance

Nice To Haves

  • Experience in digital front-end implementation, including micro-arch. definition
  • Experience with scripting/automation languages like Python/Perl
  • Firmware on Hardware-Firmware co-design
  • Experience with state-of-the-art industry standard digital tools
  • Preferred experience in design with multiple clock domains
  • RTL design experience with multi-clock, high frequency designs
  • Knowledge in digital RTL Digital Design and Implementation
  • Experience with Synthesis, Equivalence Checking, Clock-Domain Crossing (CDC) Analysis, Area/Power optimizations, Linting, Static Timing Analysis (STA)

Responsibilities

  • Debugging/Post Silicon Bring up
  • Good Documentation and presentation skills
  • Micro-architecture of simple to complex digital blocks
  • RTL development using best industry practices
  • Optimize design for key metrics like Area, Power, Performance etc.
  • Ability to work with cross-functional teams like DFT, Implementation, Verification, Emulation, Firmware regularly
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