RTL Design Engineer

Intel Corporation•Austin, TX

1d•Onsite

About The Position

Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU required to generate cell libraries, functional units, and the CPU IP block for integration in full chip designs. Participates actively in the definition of architecture and microarchitecture features of the CPU being designed. Applies various strategies, tools, and methods to write RTL and optimize logic to qualify the design to meet power, performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan and implementation to ensure design features are verified correctly and resolves and implements corrective measures for failing RTL tests to ensure correctness of features. Documents micro architectural specs (MAS) of the CPU features being designed. Supports SoC customers to ensure high-quality integration of the CPU block.

Requirements

Bachelor’s Degree in Electrical or Computer Engineering or any STEM related education with at least 2+ years of experience OR Master's Degree in Electrical or Computer Engineering
At least 1+ years of coursework or experience in Basic Logic Design
At least 1+ years of coursework or experience in Microprocessors
At least 1+ years of coursework or experience in Computer Architecture
At least 1+ years of coursework or experience in Digital design and RTL coding
At least 1+ years of coursework or experience in Verilog/SystemVerilog and/or VHDL
At least 1+ years of coursework or experience in Synthesis tools (Design Compiler, Genus)
At least 1+ years of coursework or experience in Scripting languages (Python, Perl, TCL)

Nice To Haves

Experience with advanced verification methodologies (UVM, OVM)
Knowledge of low-power design techniques
Understanding of physical design constraints and timing closure
Experience with version control systems (Git, Perforce)
Experience with simulation tools (ModelSim, VCS, Xcelium)

Responsibilities

Develops the logic design, register transfer level (RTL) coding, and simulation for a CPU.
Participates actively in the definition of architecture and microarchitecture features of the CPU.
Applies various strategies, tools, and methods to write RTL and optimize logic to meet power, performance, area, and timing goals.
Reviews the verification plan and implementation to ensure design features are verified correctly.
Resolves and implements corrective measures for failing RTL tests.
Documents micro architectural specs (MAS) of the CPU features being designed.
Supports SoC customers to ensure high-quality integration of the CPU block.