R&D Engineer Physical Design

Broadcom • San Jose, CA

2d

About The Position

We are seeking an experienced ASIC Implementation Engineer to drive physical design execution on next-generation, high-complexity system-on-chip (SoC) architectures across advanced FinFET process nodes, such as 5nm, 3nm, and 2nm. The role leads critical implementation disciplines from floorplanning through clocking, power integrity, and final timing signoff. It involves working with architecture, RTL, CAD, and package engineering teams, as well as external foundry partners and customers worldwide, to support first-pass silicon success under demanding performance, power, and area (PPA) constraints.

The position drives block- and top-level physical implementation, including floorplanning, placement, clock tree synthesis (CTS), routing, and post-route optimization. It also performs timing and signal-integrity analysis and signoff across PVT corners and operating modes, executes physical verification checks, and optimizes implementation flows using industry-standard EDA tools.

Requirements

• Bachelor of Science degree in Electrical Engineering and 13+ years of related experience, or a Master of Science degree in Electrical Engineering and 10+ years of related work experience.
• Experience with ASIC physical design implementation on advanced FinFET process nodes.
• Experience with physical implementation flows, timing and signal-integrity closure, and physical verification.
• Experience with industry-standard EDA tool suites such as Synopsys, Cadence, and Siemens.

Responsibilities

• Drive block- and top-level implementation flows, including floorplanning, placement, clock tree synthesis (CTS), routing, and post-route optimization.
• Perform static timing analysis (STA), crosstalk analysis, and signal-integrity signoff across PVT corners and operating modes.
• Execute DRC, LVS, antenna, and ERC checks, and resolve complex multi-patterning and advanced-lithography design-rule violations.
• Leverage and benchmark Synopsys, Cadence, and Siemens EDA tool suites to improve flow automation, runtime efficiency, and PPA metrics.
• Partner with geographically distributed teams, customers, and foundry interface teams to resolve implementation bottlenecks and adapt to changing project requirements.

Benefits

• Discretionary annual bonus
• Competitive new-hire equity grant and annual equity awards
• Medical, dental, and vision plans
• 401(k) participation with company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• Company-paid holidays
• Paid sick leave and vacation time
• Paid Family Leave and other leaves of absence in accordance with applicable laws

What This Job Offers

• Job Type: Full-time
• Career Level: Senior