Process Integration Development Engineer

Intel•Hillsboro, OR

21h•Onsite

About The Position

Intel's Logic Technology Development (LTD) organization develops semiconductor process technologies that extend Moore's Law. TMI Integration analyzes and plans the progression of technology from research to high-volume manufacturing while maintaining quality standards. In the MIE organization, the Process Integration Development Engineer helps engineer yields on D1 processes by driving Fab and E-Test parameters toward best-in-class targets. The engineer identifies process parameters that affect yield and performance in advanced silicon technologies, characterizes processes using metrology tools, and develops a roadmap for improving yield-cliff parameters. The role partners with modules and TD Integration to develop and qualify process fixes, ramp technologies to manufacturing volumes, and transfer them to manufacturing counterparts using the Copy Exactly Methodology. The position is onsite in Hillsboro, Oregon, and is listed as an experienced hire on Shift 1.

Requirements

Bachelor's degree in a listed or related field focused on hands-on experimental research, plus at least 4 years of engineering industry experience; or master's degree in a listed or related field with that focus, plus at least 3 years of engineering industry experience; or a Ph.D. in a listed or related field.
Strong data-analysis and problem-debugging skills.
Excellent communication skills.
Understand and adhere to key Intel values.

Nice To Haves

At least 1 year of experience in one or more of: materials characterization (such as SEM or TEM), materials fabrication, synthesis, metrology, or statistical/data analysis using tools such as MATLAB, Excel, or JMP.
Experience with semiconductor processing fundamentals, such as lithography, wet or dry etch, and chemical or mechanical polishing; semiconductor or transistor device physics; or design of experiments.
Experience with Statistical Process Control (SPC) or Design of Experiments (DOE) principles.

Responsibilities

Provide navigation and leadership to meet Intel's yield objectives.
Organize and present process parameter summaries to LTD engineering teams.
Partner with TD Integration, Yield, and Module engineers to drive root-cause understanding for critical process parameters.
Ramp processes to manufacturing volumes to demonstrate that the technology meets requirements.
Transfer technology to manufacturing counterparts using the Copy Exactly Methodology.
Hold the team and collaborators accountable for quality through TMIs and FTs.
Establish and model a team culture of trust, collaboration, safety, accountability, and excellence.
Build strong relationships with other LTD process and design teams based on mutual trust and respect.
Identify process parameters that affect yield and performance, characterize processes using metrology tools, and create a yield-cliff parameter improvement roadmap.
Work with modules and TD Integration to drive the improvement roadmap by developing and qualifying process fixes.