Process Integration Development Engineer

Intel Corporation•Hillsboro, OR

1d•$115,110 - $219,550•Onsite

About The Position

The Process Integration Development Engineer will work in Intel's Logic Technology Development organization, supporting TMI Integration and the development of advanced silicon process technologies. The role identifies process parameters that affect yield and performance, characterizes processes using metrology tools, and develops yield-cliff parameter improvement roadmaps. The engineer works with modules and TD Integration to develop and qualify process fixes, helping move technology from research through high-volume manufacturing while maintaining quality standards. The position also supports ramping technology to manufacturing volumes and transferring it to manufacturing counterparts using the Copy Exactly Methodology. It offers the opportunity to influence Intel's future process technologies and contribute to the advancement of semiconductor manufacturing.

Requirements

Bachelor's degree in Computer/Data Science, Physics, Materials Science and Engineering, Chemical Engineering, Electrical Engineering, Mechanical Engineering, Nuclear Engineering, Optics, Chemistry, or a related field focused on hands-on experimental research, and 4+ years of engineering industry experience; or
Master's degree in one of the listed or related fields focused on hands-on experimental research, and 3+ years of engineering industry experience; or
Ph.D. in one of the listed or related fields focused on hands-on experimental research.
Strong data analysis and problem-debugging skills.
Excellent communication skills.
Ability to understand and adhere to key Intel values.

Nice To Haves

1+ year of experience with materials characterization (such as SEM or TEM), materials fabrication, synthesis, metrology, or statistical/data analysis tools such as MATLAB, Excel, or JMP.
1+ year of experience with semiconductor processing fundamentals, semiconductor or transistor device physics, and design of experiments.
Experience with Statistical Process Control (SPC) or Design of Experiments (DOE) principles.

Responsibilities

Provide navigation and leadership to meet Intel's yield objectives.
Organize and present process parameter summaries to LTD engineering teams.
Partner with Intel TD Integration, Yield, and Module engineers to drive root-cause understanding for critical process parameters.
Institute ramp to manufacturing volumes to demonstrate that the technology meets requirements while transferring the technology to manufacturing counterparts via the Copy Exactly Methodology.
Hold the team and collaborators accountable for quality through TMIs and FTs.
Model and establish a team culture of trust, collaboration, safety, accountability, and excellence.
Build strong relationships with other LTD process and design teams based on mutual trust and respect.