Process Integration Development Engineer - Defect Metrology

Intel Corporation•Hillsboro, OR

1d•$133,800 - $188,890•Hybrid

About The Position

Intel's Logic Technology Development (LTD) organization develops advanced semiconductor process technologies and extends Moore's law. Within Manufacturing Integration Engineering, Defect Metrology helps move technology from research to high-volume manufacturing while maintaining quality and improving yield. The Defect Metrology Engineer identifies defects that affect yield and performance in advanced silicon process technology and characterizes processes using metrology tools. The role investigates root causes, develops defect-reduction roadmaps, and works with process module and integration teams to develop and qualify process fixes using Model-Based Problem Solving (MBPS). It also responds to defect baseline shifts, isolates root causes, and implements preventative actions using 8D methodology. The position is based in Hillsboro, Oregon, and is eligible for Intel's hybrid work model.

Requirements

PhD in Computer Science, Physics, Materials Science and Engineering, Chemical Engineering, Electrical Engineering, Mechanical Engineering, Nuclear Engineering, Optics, or Chemistry with a focus on hands-on experimental research.
Strong data analysis and problem-debugging skills.
Ability to work as a team player with flexibility and adaptability to changing business needs.
Strong ownership mindset and ability to drive problems to closure.
Excellent communication and navigation skills when addressing larger audiences.
Understanding of and adherence to Intel cultural values, including Customer First, Fearless Innovation, Results Driven, One Intel, Integrity, Quality, and Inclusion.

Nice To Haves

At least one year of experience in experimental research, including designing and conducting experiments, operating characterization, fabrication, or synthesis equipment, and analyzing statistical data.
Experience in materials characterization (such as SEM or TEM), materials fabrication, synthesis, metrology, or statistical/data analysis using tools such as MATLAB, Excel, or JMP.
Knowledge of semiconductor processing fundamentals, including lithography, wet or dry etch, and chemical or mechanical polishing; semiconductor or transistor device physics; and design of experiments.
Experience in defect metrology, defect improvement, yield improvement, or process integration.
Experience with Statistical Process Control (SPC) or Design of Experiments (DOE) principles.
Experience with complex problem-solving methodologies such as root cause analysis, MBPS, 5 Why, or Fishbone.
Understanding of semiconductor physics or semiconductor processing.
Understanding of defect metrology tools such as brightfield, darkfield, or voltage contrast (VC).

Responsibilities

Own a process segment and ensure sufficient metrology is in place to detect and respond to yield-limiting defects before end-of-line sort.
Investigate and respond to exclusionary baseline shifts to restore segment defect health to a capable, demonstrated baseline.
Develop new recipes and RFCs as part of New Product Introduction (NPI).
Provide navigation and leadership to meet Intel yield objectives using state-of-the-art metrology tools and test vehicles, including QTM and Short Loop.
Organize and present defect summaries to F25, LTD, and MDCE engineering teams.
Partner with Intel Integration, Yield, and failure analysis labs to determine root causes of defect issues.
Hold the team and collaborators accountable for quality through Integrated Module Team (IMT) and Focus Team (FT) forums.
Collaborate as part of the overall LTD Defect Metrology group.
Promote a team culture of trust, collaboration, safety, accountability, and sustaining excellence.
Build relationships with other LTD teams based on mutual trust and respect.
Investigate defect root causes and develop reduction roadmaps, then work with process module and integration teams to develop and qualify process fixes through MBPS.
Respond to defect baseline shifts, isolate root causes, and implement preventative actions consistent with 8D methodology.