Principal Modem PHY IP Design Engineer - Terawave
About The Position
At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide. We are seeking a Principal Modem PHY IP Design Engineer to support the design and development of advanced modem physical layer (PHY) IP for the Terawave program. This role will contribute to the architecture, modeling, implementation, integration, and validation of modem PHY functions for next-generation high-performance wireless ASIC solutions. The ideal candidate brings strong technical depth in digital communications and modem design, along with hands-on experience translating algorithms into implementation-ready hardware architectures. This engineer will work closely with systems, ASIC, RF, verification, FPGA, firmware, and validation teams to deliver robust and efficient PHY IP.
Requirements
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Applied Mathematics, Physics, or related technical field.
- 10+ years of experience in wireless communications, modem PHY design, DSP, or ASIC/FPGA-based baseband development.
- Strong background in digital communications theory and modem implementation.
- Experience in several of the following areas: OFDM and/or single-carrier systems, synchronization algorithms, channel estimation and equalization, adaptive modulation and coding, FEC such as LDPC, Polar, Turbo, or BCH, fixed-point analysis and quantization, MIMO or beamforming techniques.
- Proficiency with MATLAB, Python, C/C++, or similar tools for modeling and simulation.
- Experience translating algorithms into hardware-oriented architectures for ASIC or FPGA implementation.
- Strong analytical, debugging, and problem-solving skills.
- Ability to work across cross-functional teams in a fast-paced development environment.
Nice To Haves
- Master’s or PhD in Electrical Engineering, Signal Processing, Communications, or related field.
- Experience with modem PHY design for: mmWave / sub-THz / Terahertz systems, satellite or space communications, 5G/6G systems, high-throughput wireless backhaul or mesh systems.
- Familiarity with RTL design and verification flows.
- Experience with FPGA prototyping, lab characterization, and silicon bring-up.
- Knowledge of RF and mixed-signal impairments such as phase noise, carrier offset, nonlinearities, and calibration effects.
- Experience working with external IP vendors or design service partners.
- Ability to work effectively in an ambiguous, fast-moving development environment.
Responsibilities
- Design and develop modem PHY IP for Terawave ASIC and prototyping platforms.
- Contribute to PHY algorithm development and hardware architecture for functions such as: modulation and demodulation, timing and frequency synchronization, channel estimation and tracking, equalization, FEC integration, MIMO / beamforming support, impairment mitigation and calibration support.
- Translate system and link requirements into implementation-ready PHY block specifications.
- Develop floating-point, fixed-point, and bit-accurate models for modem PHY functions.
- Perform performance analysis and trade studies across throughput, latency, area, and power.
- Work with architecture and RTL teams to partition algorithms into efficient hardware implementations.
- Support interface definition and subsystem integration for PHY IP within the broader modem/baseband architecture.
- Collaborate with verification teams to define test strategies, reference models, and coverage plans.
- Analyze simulation, emulation, FPGA, lab, and silicon data to debug design issues and improve PHY performance.
- Support bring-up and validation of modem PHY features in FPGA prototypes and silicon.
- Document design assumptions, architecture decisions, performance results, and implementation details.
- Work effectively with internal teams and external design partners to help drive execution.
Benefits
- Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long-term disability, 401(k) with a company match of up to 5%, and an Education Support Program.
- Stock Options for all regular employees (working at least 20 hours/week)
- Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays.
Stand Out From the Crowd
Upload your resume and get instant feedback on how well it matches this job.
What This Job Offers
Job Type
Full-time
Career Level
Principal
