Senior Product Engineer, Modem SOC — TeraWave

BLUE ORIGIN•Central, TX
•Onsite

About The Position

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide. We are seeking a seasoned Senior Product Engineer to own the production release of the Modem SOC for TeraWave. This is a highly integrated 5G NR NTN modem System-on-Chip designed for satellite and non-terrestrial network (NTN) infrastructure digital communications SOC. Sitting at the intersection of product engineering, test engineering, and validation engineering, you will guide the modem SOC from tape-out through qualification, characterization, engineering validation, and high-volume production—directly influencing schedule attainment, yield, and cost structure. Your work will contribute to Blue Origin’s mission of enabling millions to live and work in space by advancing TeraWave’s space-based broadband communication architecture.

Requirements

  • BSEE or equivalent and 7+ years of IC product engineering / product development experience, including bringing complex digital or mixed-signal SOCs from definition to production release.
  • Demonstrated experience owning product releases through characterization, qualification, and reliability testing on advanced-node ASICs.
  • Hands-on expertise with high-speed digital SOC testing: SerDes interface characterization, DDR memory validation, compute subsystem bringup, and ATE test development.
  • Advanced knowledge of IC manufacturing processes, DFT methodologies (scan, BIST, JTAG), and failure analysis techniques.
  • Strong statistical analysis capability with proficiency in JMP, Gauge R&R, limit setting, and DOE methodology.
  • Proficiency in Python or similar scripting language for test automation, data collection, and analysis.

Nice To Haves

  • MSEE or advanced degree in Electrical Engineering or a related field.
  • Extensive experience with compute SOC or modem ASIC NPI, including ownership of schedule, planning, and budget.
  • Deep expertise in 5G NR modem PHY testing or validation in satellite / NTN applications, including L1 channelization, beam-slice datapath, and full-duplex TX/RX characterization.
  • Hands-on experience with 112G PAM4 SerDes characterization: eye diagram analysis, jitter decomposition, BER floor testing, and daisy-chain link margin.
  • Direct experience with LPDDR5x or LPDDR6 bring-up, ECC validation, throughput characterization, and margin testing.
  • Experience with Arm compute subsystem NPI: Neoverse core bringup, CMN-700 mesh, SMMU/GIC validation, and interrupt subsystem verification.
  • Experience with secure boot validation, root-of-trust authentication flows, and hardware security module testing.
  • Experience with timing and synchronization interface validation: PPS, PTP/IEEE 1588, SyncE, or GNSS reference inputs.
  • Experience with DVFS and multi-domain power management testing for advanced-node SOCs.
  • Experience developing or qualifying radiation-tolerant / radiation-hardened products for space applications.
  • Direct experience interfacing with OSATs and backend operations through NPI bringup and production ramp for advanced-node digital or mixed-signal ASICs.
  • Experience mentoring early-career engineers.

Responsibilities

  • Take full ownership of the Modem SOC product release, guiding the chip from tape-out compliance through production qualification while ensuring adherence to internal development processes and JEDEC standards.
  • Formulate and execute characterization and qualification plans across all major subsystems.
  • Drive Validation and test engineering groups for measurements and data collection, and own statistical analysis qualification, ATE correlation, production test-limit setting, and datasheet parameter validation.
  • Work collaboratively with the validation team towards the delivery of a fully characterized and tested SoC
  • Lead boot subsystem bring-up and validation: secure boot, QSPI NOR flash, EMMC NAND flash, root-of-trust authentication flows, and OTA firmware update verification.
  • Own power domain and DVFS characterization: power-mode transitions, per-domain voltage/frequency scaling, power gating, power gating, wake/sleep latency, and GALS clocking architecture validation for space mission power budgets.
  • Lead L2/L3 crypto DMA and security subsystem validation: M2M crypto throughput, key management, interrupt routing, and integrity-fail response.
  • Develop and validate ATE test plans and coverage in partnership with test engineers, including DFT-based structural test (scan, BIST, JTAG) and functional test coverage for modem PHY and compute subsystems.
  • Own failure analysis across the production lifecycle—coordinating with design, OSATs, and labs to root-cause yield, reliability, and field issues and to drive corrective actions.
  • Review NPI hardware designs—load boards, characterization boards, and probe cards—for modem SOC bring-up.
  • Spearhead cost reductions through yield improvement, test-time optimization, and ATE coverage rationalization.
  • Manage excursions, including low-yield events, RMAs, and in-field anomalies.
  • Operate as the key interface between the NPI team and backend operations and OSATs.
  • Define KPIs for modem SOC production health, monitor ongoing performance, and deliver regular reporting to program and operations leadership.
  • Continuously identify process enhancements for the NPI flow, with emphasis on modem-specific bring-up complexity across compute, modem PHY, and high-speed interface domains.
  • Act as a mentor to junior team members, fostering technical and professional growth.

Benefits

  • Medical
  • dental
  • vision
  • basic and supplemental life insurance
  • paid parental leave
  • short and long-term disability
  • 401(k) with a company match of up to 5%
  • Education Support Program
  • Stock Options for all regular employees (working at least 20 hours/week)
  • Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours
  • up to 14 company-paid holidays
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