Senior Product Engineer, Mixed Signal SOC — TeraWave
About The Position
At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide. We are seeking a seasoned Senior Product Engineer to own the production release of a highly integrated mixed-signal System-on-Chip (SOC) for TeraWave. This advanced ASIC combines analog and digital subsystems — including high-speed data converters, digital signal processing datapaths, high-speed SerDes interfaces, embedded control processors, and space-grade reliability features — into a single silicon platform. Sitting at the intersection of product engineering, test engineering, and validation engineering, you will guide the SOC from tape-out through qualification, characterization, engineering validation, and high-volume production — directly influencing schedule attainment, yield, and cost structure. Your work will contribute to Blue Origin's mission of enabling millions to live and work in space by advancing TeraWave's space-based broadband communication architecture.
Requirements
- BSEE or equivalent and 7+ years of IC product engineering / product development experience, including bringing mixed-signal or digital SOCs from definition to production release.
- Demonstrated experience owning product releases through characterization, qualification, and reliability testing on complex ASICs.
- Hands-on knowledge of mixed-signal IC testing: ADC/DAC characterization, high-speed SerDes eye margin, digital datapath functional coverage, and embedded CPU bringup.
- Advanced knowledge of IC manufacturing processes, DFT methodologies (scan, BIST, JTAG), and failure analysis techniques.
- Strong statistical analysis capability with proficiency in JMP, Gauge R&R, limit setting, and DOE methodology.
- Bench evaluation skills with proficiency in Python or similar scripting language for test automation and data analysis.
Nice To Haves
- MSEE or advanced degree in Electrical Engineering or a related field.
- Extensive experience with mixed-signal SOC or beamforming ASIC NPI, including ownership of schedule, planning, and budget.
- Direct experience with phased-array or digital beamforming architectures; familiarity with beamforming weight application, beam datapath calibration, and synchronization across antenna elements.
- Experience characterizing and validating high-speed SerDes interfaces (multi-Gbps) and parallel streaming data interfaces.
- Knowledge of embedded CPU subsystem bringup (firmware loading, control bus validation, peripheral interfaces such as Ethernet, SPI, I3C).
- Experience with ADC/DAC test methodologies: SNR, SFDR, ENOB, linearity, and sampling synchronization testing.
- Direct experience interfacing with OSATs and backend operations through NPI bringup and production ramp for advanced-node digital or mixed-signal ASICs.
- Experience developing or qualifying radiation-tolerant / radiation-hardened products for space applications, including SEE testing and mitigation validation.
- Familiarity with power management testing for space-grade products, including power-mode transitions and power-delivery characterization.
- Experience mentoring early-career engineers.
Responsibilities
- Take full ownership of the Digital BeamformerSOC product release, guiding the ASIC from tape-out compliance through production qualification while ensuring adherence to internal development processes, and JEDEC standards.
- Formulate and execute characterization and qualification plans covering AFE (ADC/DAC), DFE, element datapath (Rx/Tx), beam datapath processing, and synchronization/timing calibration subsystems.
- Drive Validation and test engineering groups for measurements and data collection, and own statistical analysis, qualification, ATE correlation, production test-limit setting, and datasheet parameter validation.
- Define engineering validation requirements for all SOC interfaces: Digital SerDes (DSI), Stream Data Interface (SDIF), host Ethernet, SPI/I3C slave, and FEIC control interfaces.
- Own failure analysis across the production lifecycle—coordinating with design, OSATs, and labs to root-cause yield, reliability, and field issues across digital, mixed-signal, and power domains, and to drive corrective actions.
- Develop and validate ATE test solutions in partnership with test engineers, including DFT-based structural test (scan, BIST) and functional test for beamforming datapath and calibration sequences.
- Assess and validate radiation-mitigation features (SEU scrubbing, redundancy, error correction) in coordination with radiation-effects and reliability teams.
- Review NPI hardware designs—load boards, probe cards, characterization and validation boards—for DBF SOC bringup.
- Spearhead cost reductions through yield improvement, test-time optimization, and ATE coverage rationalization.
- Manage excursions, including low-yield events, RMAs, and in-field anomalies.
- Operate as the key interface between the NPI team and backend operations and OSATs.
- Define KPIs for DBF SOC production health, monitor ongoing performance, and deliver regular reporting to program and operations leadership.
- Continuously identify process enhancements for the NPI flow, with emphasis on DBF SOC-specific bring-up complexity and multi-die integration.
- Mentor junior team members, fostering technical and professional growth in mixed-signal and digital SOC product engineering.
Benefits
- Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long-term disability, 401(k) with a company match of up to 5%, and an Education Support Program.
- Stock Options for all regular employees (working at least 20 hours/week)
- Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays.
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What This Job Offers
Job Type
Full-time
Career Level
Senior
