Mixed Signal Verification Engineer

Apple • Austin, TX

1d

About The Position

Design Verification Engineers at Apple are responsible for verifying the functionality and performance of Apple’s premier SOCs. This is a critical job within Apple's Hardware Technology organization, and we'd love to have you join us. You will own RNM/SystemVerilog behavioral modeling and verification of analog/RF blocks (regulators, bandgaps, data converters, LNA/PA, mixers, PLLs) inside a large SoC, including self-checking models, assertions for analog/digital specs, and AMS environment setup with analog designers. In this role, you will own the modeling and verification of advanced analog/RF blocks residing within a large SoC.

Requirements

• Minimum requirement of a bachelors degree
• Strong fundamentals in analog/RF circuit theory/topologies
• Experience with RNM coding in SystemVerilog

Nice To Haves

• MS and at least 3 years of industry experience is preferred
• Experience working with Cadence mixed signal verification environment
• Ability to read analog schematics and extract related main functionality
• Experience modeling mixed signal/RF blocks including biasing networks, power regulators, bandgaps, Opamp's, OTA's, data converters, LNA, PA, mixers, couplers, splitters, combiners, etc…
• Experience modeling high frequency PLL's is desired

Responsibilities

• Own RNM/SystemVerilog behavioral modeling and verification of analog/RF blocks (regulators, bandgaps, data converters, LNA/PA, mixers, PLLs) inside a large SoC
• Develop self-checking models
• Create assertions for analog/digital specs
• Set up AMS environment with analog designers
• Own the modeling and verification of advanced analog/RF blocks residing within a large SoC

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level