Senior Product Engineer, Modem SOC — TeraWave

Blue Origin•Hutto, TX

1d•Onsite

About The Position

Blue Origin is seeking a seasoned Senior Product Engineer to own the production release of the Modem SOC for TeraWave, a satellite communications network. This highly integrated 5G NR NTN modem System-on-Chip is designed for satellite and non-terrestrial network infrastructure digital communications. The role sits at the intersection of product engineering, test engineering, and validation engineering, guiding the modem SOC from tape-out through qualification, characterization, engineering validation, and high-volume production. The work directly influences schedule attainment, yield, and cost structure and contributes to TeraWave’s space-based broadband communication architecture. The position is based onsite in Austin, Texas. A temporary remote-work exception is approved while the Austin site is being developed. Relocation is provided, travel is expected up to 10% of the time, and interviews include a technical assessment.

Requirements

BSEE or equivalent.
At least 7 years of IC product engineering or product development experience, including bringing complex digital or mixed-signal SOCs from definition to production release.
Demonstrated experience owning product releases through characterization, qualification, and reliability testing on advanced-node ASICs.
Hands-on expertise testing high-speed digital SOCs, including SerDes interface characterization, DDR memory validation, compute subsystem bring-up, and ATE test development.
Advanced knowledge of IC manufacturing processes, DFT methodologies (scan, BIST, JTAG), and failure analysis techniques.
Strong statistical analysis capability, with proficiency in JMP, Gauge R&R, limit setting, and DOE methodology.
Proficiency in Python or a similar scripting language for test automation, data collection, and analysis.

Nice To Haves

MSEE or an advanced degree in Electrical Engineering or a related field.
Extensive compute SOC or modem ASIC NPI experience, including ownership of schedule, planning, and budget.
Deep expertise in 5G NR modem PHY testing or validation in satellite or NTN applications, including L1 channelization, beam-slice datapath, and full-duplex TX/RX characterization.
Hands-on experience with 112G PAM4 SerDes characterization, including eye diagram analysis, jitter decomposition, BER floor testing, and daisy-chain link margin.
Direct experience with LPDDR5x or LPDDR6 bring-up, ECC validation, throughput characterization, and margin testing.
Experience with Arm compute subsystem NPI, including Neoverse core bring-up, CMN-700 mesh, SMMU/GIC validation, and interrupt subsystem verification.
Experience with secure boot validation, root-of-trust authentication flows, and hardware security module testing.
Experience validating timing and synchronization interfaces such as PPS, PTP/IEEE 1588, SyncE, or GNSS reference inputs.
Experience testing DVFS and multi-domain power management for advanced-node SOCs.
Experience developing or qualifying radiation-tolerant or radiation-hardened products for space applications.
Direct experience interfacing with OSATs and backend operations through NPI bring-up and production ramp for advanced-node digital or mixed-signal ASICs.
Experience mentoring early-career engineers.

Responsibilities

Own the Modem SOC product release from tape-out compliance through production qualification, ensuring adherence to internal development processes and JEDEC standards.
Formulate and execute characterization and qualification plans across major subsystems.
Drive validation and test engineering measurements and data collection; own statistical analysis qualification, ATE correlation, production test-limit setting, and datasheet parameter validation.
Collaborate with the validation team to deliver a fully characterized and tested SoC.
Lead boot subsystem bring-up and validation, including secure boot, QSPI NOR flash, EMMC NAND flash, root-of-trust authentication flows, and OTA firmware update verification.
Own power-domain and DVFS characterization, including power-mode transitions, per-domain voltage/frequency scaling, power gating, wake/sleep latency, and GALS clocking architecture validation.
Lead L2/L3 crypto DMA and security subsystem validation, including M2M crypto throughput, key management, interrupt routing, and integrity-fail response.
Develop and validate ATE test plans and coverage with test engineers, including DFT-based structural testing (scan, BIST, JTAG) and functional test coverage for modem PHY and compute subsystems.
Own failure analysis throughout the production lifecycle, coordinating with design teams, OSATs, and labs to identify root causes of yield, reliability, and field issues and drive corrective actions.
Review NPI hardware designs, including load boards, characterization boards, and probe cards, for modem SOC bring-up.
Spearhead cost reductions through yield improvement, test-time optimization, and ATE coverage rationalization.
Manage excursions, including low-yield events, RMAs, and in-field anomalies.
Serve as the key interface between the NPI team, backend operations, and OSATs.
Define KPIs for modem SOC production health, monitor performance, and report regularly to program and operations leadership.
Identify process enhancements for the NPI flow, particularly modem-specific bring-up complexity across compute, modem PHY, and high-speed interface domains.
Mentor junior team members and foster their technical and professional growth.

Benefits

Medical, dental, and vision insurance.
Basic and supplemental life insurance.
Paid parental leave.
Short- and long-term disability.
401(k) with company match of up to 5%.
Education Support Program.
Stock options for regular employees working at least 20 hours per week.
Paid time off of up to four weeks per year, based on weekly scheduled hours.
Up to 14 company-paid holidays.
Employees may be eligible for benefits and bonuses based on role type, job level, individual contributions, company results, or other factors; bonus amounts and eligibility are not guaranteed.