Principal FPGA Engineer

Thales Defense & Security, Inc.•CLARKSBURG, MD

38d•$164,452 - $210,133•Hybrid

About The Position

Thales Defense & Security, Inc. (TDSI) is seeking a Principal FPGA Engineer to work in its Clarksburg, Maryland office. The engineer will join small product development teams and contribute to advanced communication systems, with the opportunity to see designs move into manufacturing at the company’s factory. The role involves leading FPGA architecture design, owning FPGA code and test-bench development for projects, mentoring junior engineers, and integrating and testing systems on target platforms. The engineer will evaluate system functions and performance in the lab, participate in TDSI’s Agile/SCRUM software development process, and develop signal-processing and communication-protocol software. The position requires maintaining high ethical standards and complying with company procedures and policies. U.S. citizenship is required. Selected applicants may undergo a government security investigation and must be eligible to obtain and maintain a U.S. Secret Security Clearance upon hire. The annualized pay range is $164,452–$210,133, with a target incentive compensation plan of 5%. The role is based in a hybrid working environment and follows a 9/80 schedule, with every other Friday off.

Requirements

U.S. citizenship is required.
Must be eligible to obtain and maintain a U.S. Secret Security Clearance upon hire.
Bachelor’s degree in Electrical Engineering or Computer Engineering and at least 8 years of relevant experience, or a master’s degree in Electrical Engineering and at least 6 years of FPGA-related experience.
Extensive experience in FPGA design and programming using Verilog and/or VHDL.
Hands-on experience with industry-standard FPGA development tools, such as QuestaSim/ModelSim, Synplify Pro, and Altera, Xilinx, or Lattice design suites.
Strong understanding of digital design fundamentals, including metastability, clock-domain-crossing techniques, and timing analysis for reliable timing closure in multi-clock FPGA designs.
Experience with hardware integration and system bring-up, including FPGA-to-board interface validation, high-speed I/O bring-up, and debugging with lab instrumentation such as logic analyzers and oscilloscopes.
Familiarity with digital communications concepts such as modulation/demodulation, filtering, synchronization, and channel coding.
Good communication skills and self-motivation.
Ability to comply with company guidelines, policies, and procedures and embrace company core values.

Nice To Haves

Experience implementing digital signal-processing algorithms and communication architectures in FPGA-based systems.

Responsibilities

Participate in and lead FPGA architecture design.
Own projects involving FPGA code and test-bench development.
Mentor junior engineers.
Perform system integration and testing on target platforms.
Evaluate system functions and performance in the lab.
Participate in the TDSI Agile/SCRUM software development process.
Maintain high ethical standards, including compliance with company procedures and policies.
Develop signal-processing and communication-protocol software for an advanced communication system.