Principal Digital Design Engineer

Astera Labs • San Jose, CA

1d

About The Position

Astera Labs is seeking Principal Digital Design Engineers to develop micro-architecture and implement front-end circuit designs for high-performance network controllers. The work includes RTL, synthesis, IP integration, and block-level verification. Candidates should have hands-on experience with high-speed communication and interface protocols, including PCIe, UALink, Esun, and Ethernet, and should be able to own complex designs from architecture through GDS and production.

Requirements

• Bachelor’s degree in Electrical Engineering.
• More than 8 years of experience supporting or developing complex SoC or silicon products for switch ASIC, networking, server, or storage applications.
• Hands-on, thorough knowledge of high-speed protocols such as PCIe, UALink, Esun, and Ethernet.
• Proven front-end design expertise in architecture, RTL, simulations, synthesis, timing closure, GLS, and DFT.
• Experience owning full-chip or block-level designs from architecture to GDS and driving multiple complex designs to production.
• Experience with Synopsys and/or Cadence digital design tools and flows.
• Good knowledge of design for test, including stuck-at and transition scan test insertion.
• Familiarity with UVM-based design verification.
• Silicon bring-up and debug expertise.
• Experience with small-geometry CMOS design at 28 nm or below.
• Professional attitude and ability to prioritize multiple tasks, plan and prepare for customer meetings, and work with minimal supervision.
• Entrepreneurial, open-minded, can-do attitude, with a customer-focused approach.
• Authorized to work in the United States and able to start immediately.

Nice To Haves

• Master’s degree in Electrical Engineering.
• Firmware development experience using C.
• Scripting experience with Python or equivalent programming languages.
• Development or support experience for PCIe or Ethernet switch products.

Responsibilities

• Develop micro-architecture and implement front-end circuit designs for high-performance network controllers.
• Perform RTL design, synthesis, IP integration, and block-level verification.
• Own full-chip or block-level designs from architecture through GDS and drive complex designs to production.
• Support or develop complex SoC and silicon products for switch ASIC, networking, server, or storage applications.
• Perform design simulations, timing closure, gate-level simulation, and DFT-related work.
• Support silicon bring-up and debugging.
• Prioritize multiple tasks, prepare for customer meetings, and work with minimal guidance and supervision.

What This Job Offers

• Job Type: Full-time
• Career Level: Principal