Senior Digital Design Engineer

NVIDIA•Santa Clara, CA

20h

About The Position

Join NVIDIA’s Semi-Custom Silicon products group to help craft and implement NVLink Fusion-based AI infrastructure System-on-Chips. The role focuses on NVLink Fusion, a technology that enables standardized rack-scale AI connectivity. You will analyze architectural requirements, evaluate implementation trade-offs, and develop high-performance, area- and power-efficient RTL blocks. You will create micro-architecture specifications and deliver high-quality RTL blocks that are fully verified and clean for synthesis and timing. The role also involves collaborating with architecture, verification, formal verification, and SoC integration teams, and identifying, evaluating, customizing, and integrating IP solutions for specific use cases.

Requirements

Bachelor’s or master’s degree, or equivalent experience, in Electrical Engineering or Computer Engineering.
12 or more years of relevant work experience.
Experience with high-speed connectivity protocols such as NVLink, PCI-Express, Ethernet, or UCIE.
Demonstrated experience delivering high-bandwidth datapath blocks such as data movers, protocol adaptors, network-on-chip, arbiters, and schedulers.
Deep understanding of ASIC design flows and methodology.
Strong analytical and interpersonal skills, and the ability to work well as a teammate.

Responsibilities

Analyze architectural requirements and perform implementation trade-off analysis.
Design and deliver high-performance, area- and power-efficient RTL blocks.
Create micro-architecture specifications and implement high-quality RTL.
Deliver blocks that are fully verified and synthesis- and timing-clean.
Collaborate with chip architects, verification engineers, formal verification engineers, and SoC integration engineers to meet block goals in a timely manner.
Identify potential IP solutions for specific use cases and assist with selecting, customizing, and integrating the appropriate IP.