Principal Analog IC Design Engineer, High Speed SerDes

Cadence Systems • San Jose, CA

2d

About The Position

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The Principal Analog IC Designer is responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications.

Requirements

• Minimum of 7 years of experience in CMOS SerDes or high-speed I/O IC design and development.
• Thorough understanding of jitter and signal equalization techniques.
• Proficient design experience in most of the following SerDes circuit blocks: Driver; Receiver; Serializer; Deserializer; Phase Interpolator; Low jitter PLL; High Speed Clock Distribution; ADC and DAC; Bias and Bandgap; and Voltage Regulators.
• Excellent problem solving skills, analog aptitude, good communication skills, and ability to work cooperatively in a team environment.
• Proficiency in using CAD tools for circuit simulation, layout, and physical verification.
• MS or PhD in EE

Nice To Haves

• Working knowledge of a set of common SerDes standards and their electrical requirements is a plus.
• Cadence tool experience, lab test experience, and design experience at >10Gbps and in <28nm technologies are a plus.

Responsibilities

• Design and development of analog/mixed signal IC circuit blocks from initial concept/specification through final verification of conformance to customer specifications.

Benefits

• paid vacation
• paid holidays
• 401(k) plan with employer match
• employee stock purchase plan
• a variety of medical, dental and vision plan options

What This Job Offers

• Job Type: Full-time
• Career Level: Principal