About The Position

Baya Systems is a Series B startup developing software-driven, unified fabric solutions for single-die and multi-die systems. The company designs and licenses semiconductor intellectual property and provides software development platforms for complex SoC and multi-chiplet systems. The Physical Design Engineer will contribute expertise to the company’s technology portfolio and solutions. This role is based in Bengaluru, India, or Santa Clara, California.

Requirements

  • Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • Experience across physical design, including synthesis, floor planning, place and route, timing and power closure, EM/IR, and physical design validation.
  • Experience with synthesis, place-and-route, static timing analysis, and physical design validation tools.
  • Experience implementing clock trees and power grids.
  • Experience scripting for physical design flow automation.
  • Experience with Synopsys Design Compiler, PrimeTime, ICC, Fusion Compiler, or similar tools.
  • Good knowledge of high-performance and low-power microarchitecture and logic design principles.
  • Understanding of modern sub-7nm sub-micron technology nodes and device physics.
  • Basic knowledge of System/SoC architecture and SystemVerilog RTL coding.
  • Strong communication and collaboration skills.

Responsibilities

  • Own RTL-to-GDS physical implementation flows, including synthesis, floor planning, place and route, clock tree synthesis, timing and power closure, EM/IR, physical design validation (PDV), and final physical design sign-off.
  • Own physical design and implementation of high-performance designs, from block-level to system-level components.
  • Collaborate with micro-architects to explore performance, power, and area trade-offs for high-performance and low-power designs.
  • Conduct physical implementation feasibility studies and provide design recommendations to achieve optimal PPA.
  • Develop methodologies and recipes for stages of physical implementation.
  • Perform physical design validation flows for timing, power, EM/IR, and other aspects of physical design quality.
  • Perform design rule checking (DRC), layout-versus-schematic (LVS) checks, and other physical verification tasks.

Benefits

  • Performance incentives
  • Comprehensive medical, dental, and vision benefits
  • 401(k) retirement plan
  • Equity
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