Physical Design Engineer

Apple • Austin, TX

2d

About The Position

Apple Inc. is hiring a Physical Design Engineer in Austin, Texas, to perform block-level physical design for a GPU. The role covers the physical-design flow from floor planning through physical verification and electrical analysis, with a focus on meeting performance, power, and area goals. The work includes floor planning, pin assignment, macro and logic placement, clock-tree synthesis, routing, timing closure, physical verification, and EMIR analysis. It also uses scripting to extract and analyze design data.

Requirements

• A master’s degree or foreign equivalent in Electrical Engineering or a related field.
• Two years of experience in the job offered or a related occupation.
• Experience using MOS, VLSI circuit design, or computer systems with transistor-level fundamentals and design architecture for physical-design work and troubleshooting.
• Experience using Innovus or IC Compiler for block-level floor planning, place, and route.
• Experience using PrimeTime for static timing analysis, hierarchical design, top-down design, budgeting, and timing closure.
• Experience using Calibre for design-rule closure.
• Experience using Voltus for electrical analysis.
• Experience using Genus or DC Compiler and Innovus or IC Compiler to work with RTL teams on floor planning and physical implementation, including early RTL feedback.
• Experience using Innovus or IC Compiler for physical construction and optimization flows to improve performance, power, and area.
• Experience using Perl, Tcl, or Python to parse physical-design reports and logs, create design metrics, and configure tool capabilities.

Responsibilities

• Perform GPU ASIC block-level physical design through floor planning, placement, clock-tree synthesis, routing, timing, physical verification, and electrical analysis.
• Conduct floor planning, pin assignment, macro placement, and logic placement.
• Analyze clock-tree synthesis and routing, including clock delivery and signal routing between logical cells.
• Apply low-power techniques, including clock gating, power gating, and multi-voltage designs.
• Perform design rule checks and layout-versus-schematic checks to verify fabrication requirements.
• Conduct static timing analysis and close blocks to meet timing and frequency requirements.
• Perform electromigration and electrical analysis and close related issues.
• Use Perl, Shell, Tcl, and Python scripting to extract and analyze design data.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level