Microprocessor VLSI Physical Design Engineer

Advanced Micro Devices, Inc•Fort Collins, CO
•Hybrid

About The Position

AMD’s Cores Organization develops CPUs and caches that support the company’s server, client, and gaming businesses. The Microprocessor VLSI Physical Design Engineer will join the team in Fort Collins, Colorado, as a technical expert and key contributor and leader for next-generation cores and caches. The role involves high-speed VLSI design in deep submicron FinFET processes and collaboration with RTL and physical designers across multiple sites to optimize power, performance, area, and schedule. The engineer will address design and tool problems, promote innovative approaches, and create technical presentations for peers and management. The position is not eligible for visa sponsorship.

Requirements

  • Strong analytical thinking and problem-solving skills, with excellent attention to detail.
  • Self-motivation and commitment to meeting deadlines.
  • Creativity and innovation, with a willingness to challenge the status quo.
  • Excellent verbal and written communication skills.
  • Ability to work effectively in small teams and across a large, cross-site organization.

Nice To Haves

  • Hands-on experience in high-speed VLSI design.
  • Excellent understanding of computer architecture, hardware concepts, and design tradeoffs.
  • Knowledge of chip-level floor planning, bus and pin planning, clock tree synthesis, placement, optimization, routing, parasitic extraction, static timing analysis, IR drop analysis, electromigration, physical verification, and sign-off.
  • Ability to comprehend complex Verilog RTL and make minor modifications for timing or power.
  • Knowledge of digital circuits, high-speed flops, synchronizers, level shifters, and SRAM.
  • Familiarity with programming languages such as Perl, C, and Tcl.
  • BS/MS in EE, CS, CSE, or a similar field, plus hardware design experience.

Responsibilities

  • Perform high-speed VLSI design in deep submicron FinFET processes.
  • Work with RTL and physical designers across multiple sites to optimize power, performance, area, and schedule.
  • Solve design and tool problems using innovative approaches and champion innovation across the organization.
  • Create technical presentations for peers and management.
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