VLSI Physical Design Lead Engineer

Hewlett Packard Enterprise•Fort Collins, CO
•$159,500 - $367,000•Hybrid

About The Position

Hewlett Packard Enterprise is seeking a VLSI Physical Design Lead Engineer to provide technical leadership in VLSI design and development. The role develops organization-wide architectures and methodologies across multiple platforms and organizations within the Global Business Unit, and contributes to significant technical and strategic decisions. The engineer applies deep expertise to complex problems, influences product and technology direction, and helps improve time-to-market, reduce costs, and meet customer needs. The position leads and provides accountability for multiple project teams and engineers, mentors less experienced staff, and works across engineering disciplines and with business leadership, external development partners, and industry standards groups. It also evaluates emerging technologies, identifies new projects and programs, and contributes to the development of future technical leaders. The role is hybrid, with an expectation of working an average of two days per week from an HPE office. HPE describes its benefits and development offerings as supporting team members’ physical, financial, and emotional wellbeing and career growth.

Requirements

  • Bachelor's, master's, or Ph.D. degree in Electrical Engineering, Computer Engineering, or equivalent.
  • Typically 10 or more years of experience.
  • Leadership experience and mastery of electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture.
  • Experience with static timing analysis and timing signoff.
  • Experience with timing constraints and validation.
  • Experience with synthesis and netlist quality analysis.
  • Experience with formal verification.
  • Experience with floorplanning and chip partitioning.
  • Experience with ECO implementation.
  • Experience with industry-standard EDA tools, such as Synopsys Fusion Compiler, Design Compiler, PrimeTime, or Formality, and/or Cadence RTL Compiler, Genus, or LEC.
  • Experience with clock, I/O, test, and other specialized timing-closure challenges.
  • Experience developing ASIC implementation flows, automation, and design methodologies.
  • Experience working with advanced process technologies and complex, high-performance ASIC designs.
  • Experience with hierarchical timing analysis and full-chip timing closure.
  • Excellent analytical and problem-solving skills.
  • Ability to work independently and collaboratively across multiple engineering disciplines.
  • Mastery of designing VLSI components, integrated circuitry, architectures, and algorithms into complex VLSI solutions.
  • Mastery of programming and scripting, hardware description language, electronic design automation (EDA), and/or FPGA tools; coursework in VLSI design or VLSI concepts.
  • Demonstrated ability to provide technical leadership, mentor engineers, and influence cross-functional design decisions.
  • Mastery of executive written and verbal communication skills, and mastery of English and the local language.

Nice To Haves

  • Experience using AI tools and methodologies to run design experiments, learn new information, and optimize flows.
  • Publications, patents, or other demonstrated contributions in ASIC, VLSI, physical design, or electronic design automation.
  • A history of innovation and technical leadership, including multiple patents or publications and technical presentations in VLSI or electronic/hardware component design and tools.

Responsibilities

  • Develop organization-wide architectures and methodologies for VLSI design and development across multiple platforms and organizations within the Global Business Unit.
  • Serve as an authority in key VLSI technical areas and contribute to defining industry standards and product features that may become de facto standards.
  • Review and evaluate VLSI designs and project activities for compliance with technology and development guidelines and standards.
  • Contribute to decisions with major technical impact on strategic direction and cost efficiency.
  • Provide technical leadership and accountability for multiple project teams and engineers.
  • Use VLSI expertise, business acumen, and experience to influence executive business leadership, outsourced development partners, and industry standards groups.
  • Guide and mentor less experienced staff, promoting VLSI design and development innovation and excellence.
  • Participate in and provide input to the process for selecting future technical leaders.
  • Identify emerging VLSI technologies and analyze their impact.
  • Help identify new VLSI projects and programs.

Benefits

  • A comprehensive suite of benefits supporting physical, financial, and emotional wellbeing.
  • Programs to support career goals, including becoming a knowledge expert or applying skills in another division.
  • Variable incentives may be offered.
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