Lead Memory Systems Design Engineer

Advanced Micro Devices, Inc•Austin, TX
•Onsite

About The Position

An opportunity within AMD’s client and graphics platform engineering team at its Austin site to lead post-silicon system memory engineering. The team qualifies and delivers memory technologies for AMD products across PCs, gaming, data centers, artificial intelligence, and embedded systems. The engineer will work with internal engineering teams and external partners in a lab environment to enable, debug, and qualify memory technologies including LPDDR5x/6, DDR5, and GDDR6/7 for AMD SoCs. The role spans pre-silicon preparation through first-silicon bring-up and initial production, with cross-functional collaboration and customer-platform support. This position is not eligible for visa sponsorship.

Requirements

  • Bachelor’s or master’s degree in electrical or computer engineering.
  • Deep knowledge of DRAM, memory controller, and PHY architecture and design concepts.
  • Experience with industry-standard high-speed protocols and test methodologies.
  • Knowledge of computer hardware architecture, including GPU, CPU/APU, memory, and bus logic technologies, and software architecture involving drivers, BIOS, and firmware.
  • Experience with Windows and Linux operating systems.
  • Programming or software development knowledge, including scripting languages such as Ruby, Python, or Perl.
  • Critical-thinking, organizational, and communication skills.

Nice To Haves

  • Understanding of platform-level signal integrity and power integrity technologies.
  • High-speed I/O design experience, including knowledge of transmitters, receivers, PLL/DLL, clocking, equalization techniques and circuits, training algorithms, and firmware.
  • Hands-on debug experience with GPU/APU, motherboards, memory interfaces, or bus logic.
  • Laboratory experience using equipment such as oscilloscopes, signal generators, BERTs, and logic analyzers.

Responsibilities

  • Provide systems engineering and post-silicon support for DDR, LPDDR, and GDDR memory interface IP.
  • Lead pre-silicon engagement by preparing test plans, reviewing simulation results, preparing tools and automation scripts, and ensuring BIOS readiness for post-silicon validation in collaboration with PHY/controller design, SI/PI, simulation, firmware, and BIOS teams.
  • Lead new-product bring-up from first silicon in the lab through initial production.
  • Drive cross-functional teams supporting feature enablement, feature optimization, and characterization.
  • Lead system-level debug and root-cause analysis, narrow issues to hardware or software blocks, coordinate engineering efforts to investigate issues, and verify fixes with teams including ATE, platform, design, diagnostics, firmware, and BIOS.
  • Support issues on customer platforms as requested by the customer support team.
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