Lead Engineer – RF Engineering

AeroVironment•Albuquerque, NM

6d•$111,500 - $158,025•Onsite

About The Position

We are seeking an RF PCBA Design and Test Engineer for the design, integration, and delivery of high-reliability RF/mixed-signal printed circuit assemblies for phased-array and advanced radar/communications products. You will own the PCB lifecycle—from stack-up definition and layout governance through fabrication, assembly, bring-up, release, and test lifecycle for production circuit card assemblies (CCAs) and integrated RF systems.

Requirements

Bachelor’s degree in electrical engineering or related engineering field.
5+ years in RF/microwave and mixed-signal PCB development for high-reliability products.
Proven expertise in RF board layout for L/S/C/X/Ku/Ka-band front-ends (LNAs, PAs, switches, beamformers, PLL/synth, couplers/splitters).
Hands-on with hybrid stack-ups, controlled impedance design, backdrill/HDI strategies, and thermal/shielding practices.
Proficiency with one or more ECAD suites (Altium Designer, Cadence Allegro/OrCAD, Mentor/Xpedition) and analysis tools (Keysight ADS, Ansys HFSS/SIwave, CST).
Hands-on with RF measurements and analysis: S-parameters, gain/NF, linearity (P1dB/IP3), modulation metrics (EVM/ACLR), phase noise, timing/synchronization, PLL/synth chains, PA/LNA/mixer characterization.
Proficiency automating instruments and data pipelines (Python and/or LabVIEW; MATLAB a plus) using SCPI/IVI; experience with LAN/USB/GPIB control, data historians/MES, and dashboarding (e.g., Power BI/Tableau/SQL).
Working knowledge of IPC-2221/2223, IPC-6012, IPC-A-600/-610 Class 3, ANSI/ESD S20.20, environmental/EMI test practices (e.g., MIL-STD-810/461 as applicable), calibration traceability,+ and DoD documentation practices.
Ability to obtain a DoD Top-Secret/SCI clearance.

Nice To Haves

Master’s degree preferred.
Experience delivering phased-array TR modules, beamforming IC integrations, or wideband front-ends in production.
Background in design for ruggedization and environmental screening (thermal cycling, vibe/shock) and reliability analysis (derating, FMEA).
Familiarity with PLM (e.g., Arena/Windchill), manufacturing with domestic CMs, and rapid RCCA/MRB/CCB processes.
Exposure to mmWave packaging, RF connectors/launches (SMPM/SMP/SEARAY/coax launches), and fixture design for S-parameter/over-the-air test.
Certifications (IPC CID/CID+), or equivalent PCB design credentials.
Excellent technical communication, supplier interaction, and concise documentation skills.
Track record leading cross-functional design efforts, running reviews, and mentoring engineers.
Active Secret or TS preferred.

Responsibilities

Define multilayer, hybrid dielectric RF stack- including impedance tables, via strategy (blind/buried, backdrill, VIPPO), copper weights, and plating/finish (ENIG/ENEPIG) to meet RF loss, isolation, and manufacturability targets.
Partition boards for RF, mixed-signal, and high-speed digital with attention to shielding, grounding, return paths, and thermal management (coins, thermal vias, heat spreaders).
Establish and enforce RF layout rules (transitions, launch geometries, via fences, cavity cutouts, keep-outs) and high-speed constraints (length/phase matching, crosstalk control, reference continuity).
Perform SI/PI/RF simulation and verification (e.g., ADS, HFSS, SIwave/Sigrity, CST) to predict insertion loss, VSWR/return loss, coupling, eye margins, and PDN impedance.
Lead schematic capture, ECAD library governance (footprints/3D models), and DRC/DFM sign-off in Altium/Cadence/Mentor.
Run formal design reviews, drive closure of action items, and maintain design histories, BOMs, and ECOs through PLM.
Own fab and assembly drawing packages, stack-up notes, controlled impedance requirements, coupons, panelization, and testability features.
Collaborate with PCB fabs/CMs on builds (Class 3), negotiate tolerances, and resolve issues (mask alignment, plating thickness, impedance yield, lamination strategy).
Plan and execute board bring-up; define acceptance tests and interface with RF test for S-parameters, noise figure, PAE, ACPR/EVM, and linearity (P1dB/IP3/AM-AM/AM-PM).
Define, implement, and sustain acceptance tests for CCAs (Rx/Tx/control/power) with clear entry/exit criteria, coverage metrics, and pass/fail limits; maintain golden units and calibration artifacts.
Architect automated test sequences (Python/LabVIEW/MATLAB or similar) for VNAs, spectrum analyzers, signal generators, power meters, oscilloscopes, and RF switch matrices; integrate data logging, serialization, and dashboards; manage version control and CI where appropriate.