This role requires experience with FPGA design using hardware description languages (Verilog/VHDL) and/or high-level synthesis (HLS) techniques. The role involves the development of accelerated logic targeting FPGAs. This applicant must have the ability to parse through FPGA design files and be able to integrate proprietary IP designs. With the current pace of hardware evolution there is a constant update in the availability of optimized front ends and peripherals that the candidate would have to read into and help integrate. The role would also need the applicant to be comfortable making IP datasheets and documentation.
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Job Type
Full-time
Career Level
Entry Level