FPGA Engineer

Northrop Grumman • Rolling Meadows, IL

4d • $96,300 - $144,500 • Onsite

About The Position

Northrop Grumman is seeking FPGA Design Engineers to join its team in Rolling Meadows, Illinois. The Multidomain Sensing, Targeting, and Survivability Division develops electronic warfare and targeting systems for platforms across visible-light, infrared, and millimeter-wave RF domains. Its programs include military electronic warfare, communications, missile warning and sensors, infrared countermeasure systems, automatic test equipment, modeling and simulation, and situational awareness.

The FPGA Design Engineer joins a diverse team developing advanced RF and EO/IR products and contributes throughout the FPGA development lifecycle: requirements analysis and refinement, system and FPGA architecture, RTL design and coding, testbench development, verification, synthesis, implementation, timing closure, hardware integration, qualification, production support, and troubleshooting.

The role develops FPGA-based digital subsystems integrated into circuit card assemblies and works closely with systems, software, hardware, and integration and test engineers. Designs use FPGA technologies from vendors including AMD Xilinx and Intel, supporting high-speed interfaces, RF and EO/IR signal-processing chains, controls, data links, embedded processing, and processor interfaces. The position is full-time and on-site in Rolling Meadows, Illinois. An interim Secret clearance is required before starting, and the employee must be able to obtain and maintain a Secret clearance.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a closely related engineering discipline and at least 2 years of relevant FPGA/ASIC design experience, or a master’s degree with relevant experience.
• Solid understanding of VHDL, Verilog, or SystemVerilog for RTL design and verification.
• Experience developing synchronous RTL, including state machines, control logic, data paths, clocks, and resets.
• Experience developing or modifying RTL testbenches and debugging simulation failures.
• Familiarity with the FPGA development flow, including RTL simulation, synthesis, place and route, timing analysis, and generation of FPGA programming files.
• Experience with at least one major FPGA device architecture and its toolchain, such as AMD Xilinx with Vivado or Intel FPGA with Quartus.
• Experience with FPGA electronic design automation tools, such as ModelSim/QuestaSim, Synplify, Vivado, Quartus, SOPC Builder/Qsys/Platform Designer, or DSP Builder.
• Experience with scripting or high-level programming languages such as MATLAB, Python, or C/C++.
• Exposure to developing engineering requirements, design specifications, test specifications, or other controlled technical documentation.
• Ability to complete defined technical assignments with moderate guidance, proactively communicate technical status and blockers, incorporate peer-review feedback, and work effectively across engineering disciplines.
• U.S. citizenship.
• Must have an interim Secret clearance before starting and be able to obtain and maintain a Secret security clearance.

Nice To Haves

• Current or active Secret or Top Secret clearance with SCI/SAP eligibility.
• Academic or practical experience with RF, EO/IR, communications, or digital signal-processing concepts, including I/Q representation, sampling, filtering, or frequency-domain analysis.
• Experience implementing digital signal-processing or image-processing functions in FPGA logic.
• Experience with high-speed interfaces such as AXI, PCIe, Aurora, JESD, or 10G/25G/40G+ Ethernet.
• Experience developing and integrating FPGA/software interfaces, register maps, and controls.
• Experience with MATLAB or Simulink for algorithm modeling, simulation, or FPGA implementation support.
• Familiarity with clock-domain crossings, reset-domain crossings, and timing constraints.
• Experience integrating or testing FPGA designs in a laboratory using signal generators, logic analyzers, digital oscilloscopes, protocol analyzers, or embedded FPGA debug tools such as Vivado ILA or Intel SignalTap.
• Experience using SystemVerilog/UVM, cocotb, or other structured verification frameworks.
• Familiarity with configuration-management, requirements, planning, and review tools such as Git, SVN, ClearCase, DOORS, Jira, Rally, or ClearQuest.
• Strong communication and teamwork skills; ability to work independently on defined assignments, seek feedback, and apply it to improve technical work.
• Strong sense of ownership and responsibility for technical deliverables.
• Adaptability, creativity, collaboration, initiative, and enthusiasm for solving challenging problems and advancing technology.

Responsibilities

• Contribute to requirements analysis and refinement and system and FPGA architecture.
• Design and code RTL, and develop testbenches.
• Perform verification, synthesis, implementation, and timing closure.
• Support hardware integration, qualification, production, and troubleshooting.
• Develop FPGA-based digital subsystems integrated into circuit card assemblies.
• Work with systems, software, hardware, and integration and test engineers.

Benefits

• Health insurance coverage
• Life insurance
• Disability insurance
• Savings plan
• Company-paid holidays
• Paid time off (PTO) for vacation and/or personal business
• Employees may be eligible for overtime, shift differential, and a discretionary bonus, depending on the position

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level