FPGA Engineer

Anduril•Fort Collins, CO

About The Position

The Battlespace Awareness team develops radar systems for surveillance, reconnaissance, and targeting. The Radar team works across hardware, software, and firmware in RF and digital domains, covering radar system development from concepts and architectures through fielding and sustainment. This role works with an interdisciplinary technical team to define radar architectures, design solutions, build and test prototypes, and mature them into products. The Senior FPGA Engineer will serve as the technical lead for FPGA development supporting airborne radar products, establishing FPGA design processes and best practices. The role translates algorithmic requirements into FPGA implementations, leads signal-processing design efforts, and collaborates with the Costa Mesa team to support integration across projects. It requires expertise in FPGA design, signal processing, RTL development, and Altera toolchains.

Requirements

  • Bachelor’s degree in electrical engineering, electronics engineering, computer engineering, or a related field.
  • At least 8 years of professional experience in FPGA design and development.
  • Strong RTL design expertise using SystemVerilog and/or VHDL.
  • Demonstrated experience with Altera FPGA devices and development tools; the posting lists Vivado and Quartus as examples.
  • Proven experience implementing digital signal processing on FPGAs.
  • Ability to provide self-directed technical leadership and independently drive projects from requirements to implementation.
  • Experience with FPGA verification methodologies and simulation tools.
  • Strong understanding of timing closure, resource optimization, and FPGA design constraints.
  • Eligible to obtain and maintain an active U.S. Secret security clearance.

Nice To Haves

  • Experience with radar systems or software-defined radio development.
  • Familiarity with high-speed interfaces such as PCIe, Ethernet, or JESD204B.
  • Experience with Xilinx Zynq UltraScale+, Altera AgileX, or RFSoC platforms.
  • Knowledge of embedded software development for FPGA SoC platforms.
  • Experience with MATLAB and algorithm-to-hardware workflows.
  • Understanding of RF systems and digital front-end design.
  • Familiarity with DO-254 or similar hardware design standards for airborne systems.
  • Experience with version control (Git) and continuous integration workflows.
  • Background in aerospace or defense systems development.

Responsibilities

  • Lead FPGA architecture, design, and verification for airborne radar systems from concept through production.
  • Translate signal-processing algorithms into efficient, high-performance FPGA implementations on Altera SoC/FPGA platforms.
  • Establish and drive FPGA design processes, coding standards, and verification methodologies for the airborne products team.
  • Collaborate with the Battlespace Awareness engineering team to ensure design consistency and knowledge transfer across sites.
  • Design and implement radar digital signal-processing chains, including data acquisition, filtering, and real-time processing.
  • Perform timing analysis, resource optimization, and debugging of complex FPGA designs.
  • Develop and maintain architecture specifications, design reviews, verification plans, and other design documentation.
  • Mentor and guide engineers as the team expands its FPGA capabilities.

Benefits

  • Highly competitive equity grants are included in the majority of full-time offers and are considered part of total compensation.
  • Top-tier benefits for full-time employees, including a comprehensive, competitive benefits package described as available at little to no cost to employees.
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