High-Speed PCB Designer

Capgemini • Bellevue, WA

1d • Onsite

About The Position

Capgemini Engineering is expanding its hardware engineering team and seeking an experienced engineer with expertise in high-speed hardware design, signal integrity (SI), power integrity (PI), and platform validation. This role is onsite in Bellevue, Washington. The designer will contribute to high-speed interface design and validation, PCB layout and bring-up, system-level debugging, and electrical compliance activities, collaborating with hardware, firmware, BIOS, validation, and platform architecture teams.

Requirements

• Bachelor's degree in Electrical Engineering, Electronics Engineering, Physics, or a related technical discipline, or equivalent practical experience.
• At least 3 years of experience designing and developing high-speed PCBs in a product development environment.
• Strong experience with Cadence Allegro PCB Designer for complex PCB layout and design.
• Experience using schematic capture tools such as OrCAD Capture CIS or Cadence Concept HDL.
• Solid understanding of HDI technologies, signal integrity, transmission lines, power distribution networks, and PCB manufacturing processes.
• Experience creating fabrication and assembly documentation packages, including ODB++ and IPC-2581 deliverables.
• Strong communication, collaboration, and organizational skills, with the ability to work effectively across multidisciplinary engineering teams.

Nice To Haves

• Experience designing flexible printed circuits (FPCs) and rigid-flex PCB solutions.
• Knowledge of analog circuit design, power electronics, and high-speed digital systems.
• Familiarity with integrated circuits, PCB stack-up design, and EMI/EMC considerations.
• Understanding of PCB fabrication and assembly processes and design for manufacturability (DFM) principles.
• Experience working within complex product development environments supporting new product introduction.

Responsibilities

• Design and validate high-speed interfaces, including PCIe Gen4/Gen5, USB 3.x, Ethernet, LPDDR4/LPDDR5, GDDR6/7, and DisplayPort.
• Perform SI/PI analysis, including eye diagram validation, jitter analysis, impedance control, return path optimization, PDN validation, and high-speed channel debugging.
• Work with LPDDR5 memory architecture, routing constraints, timing analysis, training and debug concepts, and memory validation methodologies.
• Perform high-speed PCB design, stack-up planning, layout review, routing optimization, and board bring-up and debugging.
• Conduct system-level debugging and root-cause analysis for signal quality, interoperability, and performance-related issues.
• Perform compliance and electrical validation using oscilloscopes, protocol analyzers, VNAs, BERTs, and industry-standard validation tools.
• Collaborate with hardware, firmware, BIOS, validation, and platform architecture teams.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level