The Hardware team at Hudson River Trading (HRT) creates high performance compute engines using FPGA and ASIC technologies to drive low latency trading decisions on global markets. We build custom solutions across the spectrum of speed and smarts: from bespoke circuits to world-class machine learning accelerators. The FPGA/ASIC Design team and Verification team work in close collaboration, pushing boundaries in low-level computer architecture, logic design, tool writing, and the interface between hardware and software. There is often overlap in skills, and both teams work together very closely. The Hardware Engineering Summer 2027 Internship offers candidates the opportunity to explore both Design and Verification roles. During HRT’s Hardware Engineering Internship, you will have the opportunity to create hardware in SystemVerilog (design) and build complex modeling and testing environments in Python (verification). You can always expect to be challenged by the ever-changing financial markets, and find yourself working on critical infrastructure in an extremely fast-paced, real-time environment.
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Career Level
Intern
Education Level
No Education Listed