FPGA Engineer

Sapsol Technologies IncMelbourne, FL

About The Position

We are seeking an expert-level verification engineer with strong SystemVerilog and/or UVM experience or FPGA verification in lab testing and/or Hardware FPGA design verification testing. The ideal candidate will be expected to communicate effectively with emerging engineers at the India GETC-I site and provide both technical and process (DO-254) guidance to the verification team.

Requirements

  • Expert-level verification engineer with strong SystemVerilog and/or UVM experience or FPGA verification in lab testing and/or Hardware FPGA design verification testing
  • Experience with design on Xilinx products would be a strong plus
  • Substantial hands-on FPGA or ASIC development experience (typically 5+ years for a senior designation).
  • Degree in a STEM (Science, Technology, Engineering, Mathematics) field.

Nice To Haves

  • Provide technical and process (DO-254) guidance to the verification team.

Responsibilities

  • RTL Design & Simulation: Develop code and testbenches using VHDL, Verilog, and SystemVerilog.
  • Verification: Create UVM constrained random environments and conduct static timing, linting, and clock-domain-crossing (CDC) analyses.
  • Hardware Lifecycle: Handle requirements capture, decomposition, architecture development, synthesis, and placement & routing.
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