FPGA Engineer
DiffLogic•Santa Clara, CA
About The Position
DiffLogic builds chips that implement models directly, rather than running models on chips. Tape-out is treated as part of the product, with frequent iterations intended to ship smarter silicon with each spin. The company is hiring FPGA engineers to work on novel problems without established solutions. The role calls for extensive experience in low-latency applications and Video IP. Team members are hands-on and move quickly. Applicants with ASIC tape-out experience are directed to apply for the ASIC / Physical Design Engineer role.
Requirements
- Extensive experience in low-latency applications.
- Extensive experience with Video IP.
Nice To Haves
- ASIC tape-out experience; applicants with this experience are asked to apply to the ASIC / Physical Design Engineer role.
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What This Job Offers
Job Type
Full-time
Education Level
No Education Listed
