About The Position

The Formal Verification Technical Lead identifies formal verification targets and completes formal verification for one or more design blocks or IPs, including CPU, cellular and connectivity, audio and image processing, neural networks, memory/DMA controllers, security, peripheral IP, interconnects, and power-management subsystems. The role works with Apple design engineers to develop formal micro-architecture specifications, formalize refinement from architecture to micro-architecture, and create comprehensive verification plans. It proves design properties, finds bugs, and partners with design teams to improve micro-architecture. The role also develops creative approaches for verifying complex micro-architectures, builds reusable and optimized formal models and verification code, and architects correct-by-construction design methods to improve formal-verification efficiency and productivity. It calls for strong technical leadership and communication, hands-on design verification expertise, and the ability to work across design and verification teams to identify candidates, plan verification, and achieve data-centric closure.

Requirements

  • Outstanding team-leading and communication skills, including experience working with design and verification teams.
  • Hands-on experience with VLSI and digital logic design and verification techniques.
  • Advanced knowledge of SoC, CPU, GPU, or cellular designs.
  • Experience developing formal property proofs for industrial-strength designs and architectures.
  • Deep understanding of pipeline architectures, memory/DMA controllers, out-of-order and speculative instruction execution hardware, bus interconnects, and cache-coherence mechanisms.
  • Confirmed understanding of formal verification technologies and abstraction techniques.
  • Knowledge and experience interpreting hardware specifications and using temporal-logic assertion-based languages such as SVA or PSL.
  • Proficiency in a scripting language and excellent debugging skills.
  • Excellent interpersonal skills and ability to collaborate as a teammate.
  • Passion for developing innovative, world-class formal verification solutions.

Nice To Haves

  • Experience with EDA formal tools; tool-development experience is a plus.
  • Understanding of application processors (CPU/GPU), their instruction set architectures, memory consistency models, or cache-coherence protocols.
  • Exposure to ARM-type architectures.
  • MS or Ph.D. in EE or CS is preferred.

Responsibilities

  • Identify formal verification targets and complete verification for one or more design blocks or IPs.
  • Work with design engineers to develop formal micro-architecture specifications.
  • Formalize refinement from architecture to micro-architecture.
  • Develop comprehensive formal verification test plans.
  • Prove design properties, find design bugs, and work with design teams to improve micro-architecture.
  • Develop creative solutions for verifying complex design micro-architectures.
  • Develop reusable and optimized formal models and verification code.
  • Architect correct-by-construction design methodologies to improve formal verification efficiency and productivity.
  • Lead and communicate with design and verification teams to identify formal verification candidates, develop test plans, and perform data-centric verification closure.
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service