2027 Internship - Formal Verification Engineer

Cirrus Logic • Austin, TX

1d • Hybrid

About The Position

Cirrus Logic is seeking an intern for its Formal Verification team in Austin, Texas. The role focuses on applying formal verification to digital designs and is intended for students currently enrolled in a master’s or PhD program in Electrical and Computer Engineering. Candidates must be available to work full-time during the internship.

The intern will support the formal verification team’s methodology practices and help develop and improve verification approaches. Cirrus Logic follows a schedule of at least two days in the office, and interns should expect to work in the office more often—up to five days per week—depending on business needs and team preference. Interns must live within commuting distance of the work location or be willing to relocate before starting.

Candidates must be able to access technical data without an export license. Cirrus Logic cannot sponsor or obtain export licenses for this role. The company states that hiring decisions are based on job-related criteria and that different approaches, ideas, and points of view are valued and respected.

Requirements

• Currently enrolled in a master’s or PhD program in Electrical and Computer Engineering.
• Knowledge of designing and implementing verification environments for module-level designs.
• Excellent communication skills and a collaborative approach to working with team members.
• Proficiency in SystemVerilog.
• Familiarity with scripting languages such as Python, Perl, TCL, or Bash.
• Experience or knowledge in UVM or equivalent methodologies.
• Knowledge of formal property languages such as SVA.
• Knowledge of property-based model checking.
• Knowledge of signal processing and analog or digital design fundamentals.
• Available for full-time employment during the internship.
• Able to access technical data without requiring an export license.
• Based within commuting distance of the Austin work location or willing to relocate before the internship begins.

Responsibilities

• Support the formal verification team in following and improving defined methodology practices.
• Develop test plans and verification methodologies to formally verify microarchitecture and design.
• Perform failure analysis and resolution, coverage analysis, and population.
• Implement and improve functional and formal verification.

What This Job Offers

• Job Type: Full-time
• Career Level: Intern