Formal Verification Engineer - New College Grad 2027

NVIDIA•Santa Clara, CA

About The Position

As a Formal Verification Engineer at NVIDIA, you will work on formal verification for industry-leading chips. You will own formal verification of RTL units for next-generation chip designs, requiring deep knowledge of unit architecture and microarchitecture. The role calls for strong analytical skills, a computer architecture background, and experience applying effective verification methodologies. You will collaborate with design and verification teams to develop verification plans and environments, apply formal verification techniques to prove digital design correctness, debug RTL failures, and automate verification processes. This is a new college graduate position for 2027.

Requirements

BS or MS in Computer Science, Computer Engineering, Electrical Engineering, Mathematics, or equivalent experience.
Strong analytical skills to solve difficult problems.
Knowledge or experience in formal verification techniques.
Strong knowledge of CPU/GPU architectures and digital logic.
Understanding of abstraction techniques for effective verification.
Hands-on experience with HDLs such as Verilog or SystemVerilog.
Ability to understand RTL quickly.
Understanding of temporal logic assertions.
Excellent communication skills and ability to collaborate effectively with team members.

Nice To Haves

Experience with formal verification tools such as Jasper, IFV, SMV, or SPIN.

Responsibilities

Develop comprehensive formal verification test plan documents.
Identify key DUT behaviors and create a verification plan.
Develop verification environments, including environment assumptions, assertions, and cover properties, in the context of the verification plan.
Apply formal verification techniques to prove the correctness of digital designs.
Debug RTL to identify failure scenarios.
Develop scripts to automate the verification process.
Review formal setups and proofs with design and verification teams.